From a37b58ce09e36a4240ef015b73d6ce6acbca886d Mon Sep 17 00:00:00 2001 From: Alkis Evlogimenos Date: Thu, 2 Oct 2003 16:57:49 +0000 Subject: [PATCH] Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller. llvm-svn: 8819 --- include/llvm/CodeGen/Passes.h | 4 +++- lib/CodeGen/Passes.cpp | 35 +++++++++++++++++++++++++++++ lib/Target/X86/X86TargetMachine.cpp | 31 ++----------------------- 3 files changed, 40 insertions(+), 30 deletions(-) create mode 100644 lib/CodeGen/Passes.cpp diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h index 309bf66cf81..a5dc323aa92 100644 --- a/include/llvm/CodeGen/Passes.h +++ b/include/llvm/CodeGen/Passes.h @@ -19,7 +19,9 @@ class TargetMachine; // extern const PassInfo *PHIEliminationID; -enum RegAllocName { simple, local }; +/// Creates a register allocator as the user specified on the command +/// line. +FunctionPass *createRegisterAllocator(); /// SimpleRegisterAllocation Pass - This pass converts the input machine code /// from SSA form to use explicit registers by spilling every register. Wow, diff --git a/lib/CodeGen/Passes.cpp b/lib/CodeGen/Passes.cpp new file mode 100644 index 00000000000..86f354eb32f --- /dev/null +++ b/lib/CodeGen/Passes.cpp @@ -0,0 +1,35 @@ +//===-- Passes.cpp - Target independent code generation passes -*- C++ -*-===// +// +// This file defines interfaces to access the target independent code +// generation passes provided by the LLVM backend. +// +//===---------------------------------------------------------------------===// + +#include "llvm/CodeGen/Passes.h" +#include "Support/CommandLine.h" + +namespace { + enum RegAllocName { simple, local }; + + cl::opt + RegAlloc("regalloc", + cl::desc("Register allocator to use: (default = simple)"), + cl::Prefix, + cl::values(clEnumVal(simple, " simple register allocator"), + clEnumVal(local, " local register allocator"), + 0), + cl::init(local)); +} + +FunctionPass *createRegisterAllocator() +{ + switch (RegAlloc) { + case simple: + return createSimpleRegisterAllocator(); + case local: + return createLocalRegisterAllocator(); + default: + assert(0 && "no register allocator selected"); + return 0; // not reached + } +} diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 8f6829f6de4..d511de67212 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -16,15 +16,6 @@ #include "Support/Statistic.h" namespace { - cl::opt - RegAlloc("regalloc", - cl::desc("Register allocator to use: (default = simple)"), - cl::Prefix, - cl::values(clEnumVal(simple, " simple register allocator"), - clEnumVal(local, " local register allocator"), - 0), - cl::init(local)); - cl::opt PrintCode("print-machineinstrs", cl::desc("Print generated machine code")); cl::opt NoPatternISel("disable-pattern-isel", cl::init(true), @@ -73,16 +64,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, PM.add(createMachineFunctionPrinterPass()); // Perform register allocation to convert to a concrete x86 representation - switch (RegAlloc) { - case simple: - PM.add(createSimpleRegisterAllocator()); - break; - case local: - PM.add(createLocalRegisterAllocator()); - break; - default: - assert(0 && "no register allocator selected"); - } + PM.add(createRegisterAllocator()); if (PrintCode) PM.add(createMachineFunctionPrinterPass()); @@ -126,16 +108,7 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) { PM.add(createMachineFunctionPrinterPass()); // Perform register allocation to convert to a concrete x86 representation - switch (RegAlloc) { - case simple: - PM.add(createSimpleRegisterAllocator()); - break; - case local: - PM.add(createLocalRegisterAllocator()); - break; - default: - assert(0 && "no register allocator selected"); - } + PM.add(createRegisterAllocator()); if (PrintCode) PM.add(createMachineFunctionPrinterPass());