RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
Code Issues Projects Releases Wiki Activity

[RegAllocFast] Scan physcial reg definitions before assigning virtual reg definitions

Browse Source 
When assigning the definitions of an instruction we were updating
the available registers while walking the definitions. Some of
those definitions may be from physical registers and thus, they are
not available for other definitions to take, but by the time we see
that we may have already assign these registers to another
virtual register.

Fix that by walking through all the definitions and mark as unavailable
the physical register definitions, then do the virtual register assignments.

PR41790

llvm-svn: 360278
This commit is contained in:
Quentin Colombet 2019-05-08 18:30:26 +00:00
parent 6b0ca9752b
commit a4075b4fd6
2 changed files with 35 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
lib/CodeGen/RegAllocFast.cpp
View File

@ -1058,6 +1058,20 @@ void RegAllocFast::allocateInstruction(MachineInstr &MI) {
}
// Third scan.
// Mark all physreg defs as used before allocating virtreg defs.
for (unsigned I = 0; I != DefOpEnd; ++I) {
const MachineOperand &MO = MI.getOperand(I);
if (!MO.isReg() || !MO.isDef() || !MO.getReg() || MO.isEarlyClobber())
continue;
unsigned Reg = MO.getReg();
if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg) ||
!MRI->isAllocatable(Reg))
continue;
definePhysReg(MI, Reg, MO.isDead() ? regFree : regReserved);
}
// Fourth scan.
// Allocate defs and collect dead defs.
for (unsigned I = 0; I != DefOpEnd; ++I) {
const MachineOperand &MO = MI.getOperand(I);
@ -1065,11 +1079,9 @@ void RegAllocFast::allocateInstruction(MachineInstr &MI) {
continue;
unsigned Reg = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
if (!MRI->isAllocatable(Reg)) continue;
definePhysReg(MI, Reg, MO.isDead() ? regFree : regReserved);
// We have already dealt with phys regs in the previous scan.
if (TargetRegisterInfo::isPhysicalRegister(Reg))
continue;
}
MCPhysReg PhysReg = defineVirtReg(MI, I, Reg, CopySrcReg);
if (setPhysReg(MI, MI.getOperand(I), PhysReg)) {
VirtDead.push_back(Reg);

19
test/CodeGen/X86/virtreg-physreg-def-regallocfast.mir Normal file
View File

@ -0,0 +1,19 @@
# RUN: llc -o - -mtriple=x86_64-- -run-pass=regallocfast %s | FileCheck %s
# Fast regalloc used to not collect physical register definitions
# before walking and assigning the virtual definition.
# Therefore it was possible for a virtual definition to end up
# using the same register as a later (in terms of operand list) physical
# register.
# Check this does not happen.
#
# PR41790
---
name: instruction_with_1virtreg_1physreg_defs
tracksRegLiveness: true
body: |
bb.0:
; CHECK-NOT: $rax = KILL implicit-def dead $rax
%0:gr64 = KILL implicit-def dead $rax
KILL killed %0
RET 0
...