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Add predicate and 's' bit operands to PICADD instruction lowering.
llvm-svn: 113860
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@ -1349,6 +1349,11 @@ void ARMAsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
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AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
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AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
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AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
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// Add predicate operands.
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AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
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AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
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// Add 's' bit operand (always reg0 for this)
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AddInst.addOperand(MCOperand::CreateReg(0));
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OutStreamer.EmitInstruction(AddInst);
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return;
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}
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