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[RISCV][NFC] IsEligibleForTailCallOptimization -> isEligibleForTailCallOptimization
Also clang-format the modified hunks. llvm-svn: 354584
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@ -1367,12 +1367,12 @@ SDValue RISCVTargetLowering::LowerFormalArguments(
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return Chain;
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}
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/// IsEligibleForTailCallOptimization - Check whether the call is eligible
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/// isEligibleForTailCallOptimization - Check whether the call is eligible
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/// for tail call optimization.
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/// Note: This is modelled after ARM's IsEligibleForTailCallOptimization.
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bool RISCVTargetLowering::IsEligibleForTailCallOptimization(
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CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF,
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const SmallVector<CCValAssign, 16> &ArgLocs) const {
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bool RISCVTargetLowering::isEligibleForTailCallOptimization(
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CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF,
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const SmallVector<CCValAssign, 16> &ArgLocs) const {
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auto &Callee = CLI.Callee;
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auto CalleeCC = CLI.CallConv;
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@ -1475,8 +1475,7 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
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// Check if it's really possible to do a tail call.
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if (IsTailCall)
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IsTailCall = IsEligibleForTailCallOptimization(ArgCCInfo, CLI, MF,
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ArgLocs);
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IsTailCall = isEligibleForTailCallOptimization(ArgCCInfo, CLI, MF, ArgLocs);
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if (IsTailCall)
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++NumTailCalls;
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@ -141,9 +141,9 @@ private:
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SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
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SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
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bool IsEligibleForTailCallOptimization(CCState &CCInfo,
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CallLoweringInfo &CLI, MachineFunction &MF,
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const SmallVector<CCValAssign, 16> &ArgLocs) const;
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bool isEligibleForTailCallOptimization(
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CCState &CCInfo, CallLoweringInfo &CLI, MachineFunction &MF,
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const SmallVector<CCValAssign, 16> &ArgLocs) const;
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TargetLowering::AtomicExpansionKind
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shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override;
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