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AMDGPU: Error on addrspacecasts that aren't actually implemented
llvm-svn: 254469
This commit is contained in:
Matt Arsenault
parent
d3e9d622f3
commit
a4bcdcc1fc
@ -11,6 +11,8 @@
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/// \brief Defines an instruction selector for the AMDGPU target.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUDiagnosticInfoUnsupported.h"
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#include "AMDGPUInstrInfo.h"
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#include "AMDGPUISelLowering.h" // For AMDGPUISD
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#include "AMDGPURegisterInfo.h"
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@ -1208,13 +1210,14 @@ SDNode *AMDGPUDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
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AddrSpaceCastSDNode *ASC = cast<AddrSpaceCastSDNode>(N);
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SDLoc DL(N);
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const MachineFunction &MF = CurDAG->getMachineFunction();
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DiagnosticInfoUnsupported NotImplemented(*MF.getFunction(),
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"addrspacecast not implemented");
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CurDAG->getContext()->diagnose(NotImplemented);
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assert(Subtarget->hasFlatAddressSpace() &&
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"addrspacecast only supported with flat address space!");
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assert((ASC->getSrcAddressSpace() != AMDGPUAS::CONSTANT_ADDRESS &&
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ASC->getDestAddressSpace() != AMDGPUAS::CONSTANT_ADDRESS) &&
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"Cannot cast address space to / from constant address!");
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assert((ASC->getSrcAddressSpace() == AMDGPUAS::FLAT_ADDRESS ||
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ASC->getDestAddressSpace() == AMDGPUAS::FLAT_ADDRESS) &&
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"Can only cast to / from flat address space!");
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66
test/CodeGen/AMDGPU/addrspacecast.ll
Normal file
66
test/CodeGen/AMDGPU/addrspacecast.ll
Normal file
@ -0,0 +1,66 @@
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; RUN: not llc -O0 -march=amdgcn -mcpu=bonaire -mattr=-promote-alloca < %s 2>&1 | FileCheck -check-prefix=ERROR %s
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; ERROR: unsupported addrspacecast not implemented
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; XUN: llc -O0 -march=amdgcn -mcpu=bonaire -mattr=-promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NO-PROMOTE %s
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; XUN: llc -O0 -march=amdgcn -mcpu=bonaire -mattr=+promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-PROMOTE %s
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; XUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NO-PROMOTE %s
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; XUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=+promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-PROMOTE %s
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; Disable optimizations in case there are optimizations added that
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; specialize away generic pointer accesses.
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; CHECK-LABEL: {{^}}branch_use_flat_i32:
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; CHECK: flat_store_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}
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; CHECK: s_endpgm
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define void @branch_use_flat_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* %gptr, i32 addrspace(3)* %lptr, i32 %x, i32 %c) #0 {
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entry:
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%cmp = icmp ne i32 %c, 0
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br i1 %cmp, label %local, label %global
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local:
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%flat_local = addrspacecast i32 addrspace(3)* %lptr to i32 addrspace(4)*
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br label %end
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global:
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%flat_global = addrspacecast i32 addrspace(1)* %gptr to i32 addrspace(4)*
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br label %end
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end:
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%fptr = phi i32 addrspace(4)* [ %flat_local, %local ], [ %flat_global, %global ]
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store i32 %x, i32 addrspace(4)* %fptr, align 4
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; %val = load i32, i32 addrspace(4)* %fptr, align 4
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; store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; TODO: This should not be zero when registers are used for small
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; scratch allocations again.
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; Check for prologue initializing special SGPRs pointing to scratch.
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; CHECK-LABEL: {{^}}store_flat_scratch:
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; CHECK: s_movk_i32 flat_scratch_lo, 0
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; CHECK-NO-PROMOTE: s_movk_i32 flat_scratch_hi, 0x28{{$}}
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; CHECK-PROMOTE: s_movk_i32 flat_scratch_hi, 0x0{{$}}
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; CHECK: flat_store_dword
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; CHECK: s_barrier
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; CHECK: flat_load_dword
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define void @store_flat_scratch(i32 addrspace(1)* noalias %out, i32) #0 {
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%alloca = alloca i32, i32 9, align 4
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%x = call i32 @llvm.r600.read.tidig.x() #3
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%pptr = getelementptr i32, i32* %alloca, i32 %x
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%fptr = addrspacecast i32* %pptr to i32 addrspace(4)*
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store i32 %x, i32 addrspace(4)* %fptr
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; Dummy call
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call void @llvm.AMDGPU.barrier.local() #1
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%reload = load i32, i32 addrspace(4)* %fptr, align 4
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store i32 %reload, i32 addrspace(1)* %out, align 4
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ret void
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}
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declare void @llvm.AMDGPU.barrier.local() #1
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declare i32 @llvm.r600.read.tidig.x() #3
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attributes #0 = { nounwind }
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attributes #1 = { nounwind noduplicate }
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attributes #3 = { nounwind readnone }
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@ -7,32 +7,6 @@
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; specialize away generic pointer accesses.
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; CHECK-LABEL: {{^}}branch_use_flat_i32:
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; CHECK: flat_store_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}
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; CHECK: s_endpgm
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define void @branch_use_flat_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* %gptr, i32 addrspace(3)* %lptr, i32 %x, i32 %c) #0 {
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entry:
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%cmp = icmp ne i32 %c, 0
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br i1 %cmp, label %local, label %global
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local:
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%flat_local = addrspacecast i32 addrspace(3)* %lptr to i32 addrspace(4)*
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br label %end
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global:
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%flat_global = addrspacecast i32 addrspace(1)* %gptr to i32 addrspace(4)*
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br label %end
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end:
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%fptr = phi i32 addrspace(4)* [ %flat_local, %local ], [ %flat_global, %global ]
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store i32 %x, i32 addrspace(4)* %fptr, align 4
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; %val = load i32, i32 addrspace(4)* %fptr, align 4
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; store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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}
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; These testcases might become useless when there are optimizations to
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; remove generic pointers.
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@ -150,32 +124,6 @@ define void @zextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)*
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ret void
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}
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; TODO: This should not be zero when registers are used for small
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; scratch allocations again.
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; Check for prologue initializing special SGPRs pointing to scratch.
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; CHECK-LABEL: {{^}}store_flat_scratch:
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; CHECK: s_movk_i32 flat_scratch_lo, 0
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; CHECK-NO-PROMOTE: s_movk_i32 flat_scratch_hi, 0x28{{$}}
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; CHECK-PROMOTE: s_movk_i32 flat_scratch_hi, 0x0{{$}}
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; CHECK: flat_store_dword
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; CHECK: s_barrier
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; CHECK: flat_load_dword
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define void @store_flat_scratch(i32 addrspace(1)* noalias %out, i32) #0 {
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%alloca = alloca i32, i32 9, align 4
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%x = call i32 @llvm.r600.read.tidig.x() #3
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%pptr = getelementptr i32, i32* %alloca, i32 %x
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%fptr = addrspacecast i32* %pptr to i32 addrspace(4)*
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store i32 %x, i32 addrspace(4)* %fptr
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; Dummy call
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call void @llvm.AMDGPU.barrier.local() #1
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%reload = load i32, i32 addrspace(4)* %fptr, align 4
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store i32 %reload, i32 addrspace(1)* %out, align 4
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ret void
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}
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declare void @llvm.AMDGPU.barrier.local() #1
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declare i32 @llvm.r600.read.tidig.x() #3
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