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Added intrinsics to match __builtin_ia32_pslldqi128 and
__builtin_ia32_psrldqi128. llvm-svn: 27411
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@ -82,6 +82,7 @@ def llvm_descriptor_ty : LLVMType<iPTR, "Type::PointerTyID">; // global*
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def llvm_v16i8_ty : LLVMPackedType<v16i8,16, llvm_sbyte_ty>; // 16 x sbyte
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def llvm_v8i16_ty : LLVMPackedType<v8i16, 8, llvm_short_ty>; // 8 x short
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def llvm_v2i64_ty : LLVMPackedType<v2i64, 2, llvm_long_ty>; // 2 x long
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def llvm_v2i32_ty : LLVMPackedType<v2i32, 2, llvm_int_ty>; // 2 x int
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def llvm_v4i32_ty : LLVMPackedType<v4i32, 4, llvm_int_ty>; // 4 x int
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def llvm_v4f32_ty : LLVMPackedType<v4f32, 4, llvm_float_ty>; // 4 x float
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@ -183,6 +183,16 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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llvm_v2f64_ty], [InstrNoMem]>;
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}
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// Integer shift ops.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
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Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
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llvm_int_ty], [InstrNoMem]>;
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def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
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Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
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llvm_int_ty], [InstrNoMem]>;
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}
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// Misc.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
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