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Revise head-of-file comment.
Eliminate some excess whitespace. Fix bug in CallArgsDescriptor::get() handling call through a null pointer. llvm-svn: 16012
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@ -7,18 +7,12 @@
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//
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//===----------------------------------------------------------------------===//
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//
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// Representation of the sequence of machine instructions created for a single
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// VM instruction. Additionally records information about hidden and implicit
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// values used by the machine instructions: about hidden values used by the
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// machine instructions:
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//
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// "Temporary values" are intermediate values used in the machine instruction
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// sequence, but not in the VM instruction. Note that such values should be
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// treated as pure SSA values with no interpretation of their operands (i.e., as
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// a TmpInstruction object which actually represents such a value).
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//
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// (2) "Implicit uses" are values used in the VM instruction but not in the
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// machine instruction sequence
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// Container for the sequence of MachineInstrs created for a single
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// LLVM Instruction. MachineCodeForInstruction also tracks temporary values
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// (TmpInstruction objects) created during SparcV9 code generation, so that
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// they can be deleted when they are no longer needed, and finally, it also
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// holds some extra information for 'call' Instructions (using the
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// CallArgsDescriptor object, which is also implemented in this file).
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//
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//===----------------------------------------------------------------------===//
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@ -31,25 +25,24 @@
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#include "MachineFunctionInfo.h"
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#include "MachineInstrAnnot.h"
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#include "SparcV9TmpInstr.h"
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#include "SparcV9RegisterInfo.h"
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using namespace llvm;
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MachineCodeForInstruction &MachineCodeForInstruction::get(const Instruction *I){
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MachineFunction &MF = MachineFunction::get(I->getParent()->getParent());
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return MF.getInfo<SparcV9FunctionInfo>()->MCFIEntries[I];
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}
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void MachineCodeForInstruction::destroy(const Instruction *I) {
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MachineFunction &MF = MachineFunction::get(I->getParent()->getParent());
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MF.getInfo<SparcV9FunctionInfo>()->MCFIEntries.erase(I);
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}
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void
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MachineCodeForInstruction::dropAllReferences()
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{
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void MachineCodeForInstruction::dropAllReferences() {
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for (unsigned i=0, N=tempVec.size(); i < N; i++)
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cast<Instruction>(tempVec[i])->dropAllReferences();
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}
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MachineCodeForInstruction::~MachineCodeForInstruction() {
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// Let go of all uses in temp. instructions
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dropAllReferences();
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@ -65,7 +58,6 @@ MachineCodeForInstruction::~MachineCodeForInstruction() {
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delete callArgsDesc;
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}
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CallArgsDescriptor::CallArgsDescriptor(CallInst* _callInstr,
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TmpInstruction* _retAddrReg,
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bool _isVarArgs, bool _noPrototype)
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@ -91,21 +83,26 @@ CallInst *CallArgsDescriptor::getReturnValue() const {
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return (callInstr->getType() == Type::VoidTy? NULL : callInstr);
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}
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// Mechanism to get the descriptor for a CALL MachineInstr.
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// We get the LLVM CallInstr from the ret. addr. register argument
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// of the CALL MachineInstr (which is explicit operand #3 for indirect
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// calls or the last implicit operand for direct calls). We then get
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// the CallArgsDescriptor from the MachineCodeForInstruction object for
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// the CallInstr.
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// This is roundabout but avoids adding a new map or annotation just
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// to keep track of CallArgsDescriptors.
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//
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CallArgsDescriptor *CallArgsDescriptor::get(const MachineInstr* MI) {
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const TmpInstruction* retAddrReg =
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cast<TmpInstruction>(isa<Function>(MI->getOperand(0).getVRegValue())
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? MI->getImplicitRef(MI->getNumImplicitRefs()-1)
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: MI->getOperand(2).getVRegValue());
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/// CallArgsDescriptor::get - Mechanism to get the descriptor for a CALL
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/// MachineInstr. We get the LLVM CallInst from the return-address register
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/// argument of the CALL MachineInstr (which is explicit operand #2 for
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/// indirect calls or the last implicit operand for direct calls). We then get
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/// the CallArgsDescriptor from the MachineCodeForInstruction object for the
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/// CallInstr. This is roundabout but avoids adding a new map or annotation
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/// just to keep track of CallArgsDescriptors.
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///
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CallArgsDescriptor *CallArgsDescriptor::get(const MachineInstr *MI) {
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const Value *retAddrVal = 0;
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if ((MI->getOperand (0).getType () == MachineOperand::MO_MachineRegister
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&& MI->getOperand (0).getReg () == SparcV9::g0)
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|| (MI->getOperand (0).getType () == MachineOperand::MO_VirtualRegister
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&& !isa<Function> (MI->getOperand (0).getVRegValue ()))) {
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retAddrVal = MI->getOperand (2).getVRegValue ();
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} else {
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retAddrVal = MI->getImplicitRef (MI->getNumImplicitRefs () - 1);
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}
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const TmpInstruction* retAddrReg = cast<TmpInstruction> (retAddrVal);
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assert(retAddrReg->getNumOperands() == 1 &&
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isa<CallInst>(retAddrReg->getOperand(0)) &&
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"Location of callInstr arg for CALL instr. changed? FIX THIS CODE!");
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