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[tblgen] Add getOperatorAsDef() to Record

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Summary:
While working with DagInit's, it's often the case that you expect the
operator to be a reference to a def. This patch adds a wrapper for this
common case to reduce the amount of boilerplate callers need to duplicate
repeatedly.

getOperatorAsDef() returns the record if the DagInit has an operator that is
a DefInit. Otherwise, it prints a fatal error.

There's only a few pre-existing examples in LLVM at the moment and I've
left a few instances of the code this simplifies as they had more specific
error messages than the generic one this produces. I'm going to be using
this a fair bit in my subsequent patches.

Reviewers: bogner, volkan, nhaehnle

Reviewed By: nhaehnle

Subscribers: nhaehnle, hiraditya, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, lenary, s.egerton, pzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68424

llvm-svn: 374101
This commit is contained in:
Daniel Sanders 2019-10-08 18:41:32 +00:00
parent 7769861822
commit a562501cd0
4 changed files with 11 additions and 13 deletions
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1
include/llvm/TableGen/Record.h
View File

@ -1330,6 +1330,7 @@ public:
void Profile(FoldingSetNodeID &ID) const;
Init *getOperator() const { return Val; }
Record *getOperatorAsDef(ArrayRef<SMLoc> Loc) const;
StringInit *getName() const { return ValName; }

7
lib/TableGen/Record.cpp
View File

@ -1930,6 +1930,13 @@ void DagInit::Profile(FoldingSetNodeID &ID) const {
ProfileDagInit(ID, Val, ValName, makeArrayRef(getTrailingObjects<Init *>(), NumArgs), makeArrayRef(getTrailingObjects<StringInit *>(), NumArgNames));
}
Record *DagInit::getOperatorAsDef(ArrayRef<SMLoc> Loc) const {
if (DefInit *DefI = dyn_cast<DefInit>(Val))
return DefI->getDef();
PrintFatalError(Loc, "Expected record as operator");
return nullptr;
}
Init *DagInit::resolveReferences(Resolver &R) const {
SmallVector<Init*, 8> NewArgs;
NewArgs.reserve(arg_size());

3
utils/TableGen/AsmWriterEmitter.cpp
View File

@ -784,8 +784,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
continue; // Aliases with priority 0 are never emitted.
const DagInit *DI = R->getValueAsDag("ResultInst");
const DefInit *Op = cast<DefInit>(DI->getOperator());
AliasMap[getQualifiedName(Op->getDef())].insert(
AliasMap[getQualifiedName(DI->getOperatorAsDef(R->getLoc()))].insert(
std::make_pair(CodeGenInstAlias(R, Target), Priority));
}

13
utils/TableGen/RISCVCompressInstEmitter.cpp
View File

@ -411,12 +411,8 @@ void RISCVCompressInstEmitter::evaluateCompressPat(Record *Rec) {
assert(SourceDag && "Missing 'Input' in compress pattern!");
LLVM_DEBUG(dbgs() << "Input: " << *SourceDag << "\n");
DefInit *OpDef = dyn_cast<DefInit>(SourceDag->getOperator());
if (!OpDef)
PrintFatalError(Rec->getLoc(),
Rec->getName() + " has unexpected operator type!");
// Checking we are transforming from compressed to uncompressed instructions.
Record *Operator = OpDef->getDef();
Record *Operator = SourceDag->getOperatorAsDef(Rec->getLoc());
if (!Operator->isSubClassOf("RVInst"))
PrintFatalError(Rec->getLoc(), "Input instruction '" + Operator->getName() +
"' is not a 32 bit wide instruction!");
@ -428,12 +424,7 @@ void RISCVCompressInstEmitter::evaluateCompressPat(Record *Rec) {
assert(DestDag && "Missing 'Output' in compress pattern!");
LLVM_DEBUG(dbgs() << "Output: " << *DestDag << "\n");
DefInit *DestOpDef = dyn_cast<DefInit>(DestDag->getOperator());
if (!DestOpDef)
PrintFatalError(Rec->getLoc(),
Rec->getName() + " has unexpected operator type!");
Record *DestOperator = DestOpDef->getDef();
Record *DestOperator = DestDag->getOperatorAsDef(Rec->getLoc());
if (!DestOperator->isSubClassOf("RVInst16"))
PrintFatalError(Rec->getLoc(), "Output instruction '" +
DestOperator->getName() +