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* Straighten out #includes
* Switch from MachineCodeForVMInstr to MachineCodeForInstruction model llvm-svn: 1644
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@ -13,21 +13,18 @@
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//**************************************************************************/
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#include "SchedGraph.h"
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#include "llvm/InstrTypes.h"
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#include "llvm/Instruction.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Method.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/InstrSelection.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/Target/MachineInstrInfo.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Method.h"
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#include "llvm/iOther.h"
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#include "Support/StringExtras.h"
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#include "Support/STLExtras.h"
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#include <algorithm>
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#include <vector>
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#include <iostream>
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#include <ext/hash_map>
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using std::vector;
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using std::pair;
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@ -353,12 +350,12 @@ SchedGraph::addCDEdges(const TerminatorInst* term,
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const TargetMachine& target)
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{
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const MachineInstrInfo& mii = target.getInstrInfo();
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MachineCodeForVMInstr& termMvec = term->getMachineInstrVec();
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MachineCodeForInstruction &termMvec = MachineCodeForInstruction::get(term);
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// Find the first branch instr in the sequence of machine instrs for term
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//
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unsigned first = 0;
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while (! mii.isBranch(termMvec[first]->getOpCode()))
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while (!mii.isBranch(termMvec[first]->getOpCode()))
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++first;
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assert(first < termMvec.size() &&
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"No branch instructions for BR? Ok, but weird! Delete assertion.");
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