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[X86] Fix a typo error.

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Summary: This will result opcode MULX32Hrm been emitted to MULX32Hrr.

Reviewed by: craig.topper

Differential Revision: https://reviews.llvm.org/D82472
This commit is contained in:
Wang, Pengfei 2020-06-24 23:37:06 +08:00
parent 3beff269e6
commit a5dbdf7807
2 changed files with 2 additions and 2 deletions
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2
lib/Target/X86/X86MCInstLower.cpp
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@ -518,7 +518,7 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
switch (OutMI.getOpcode()) {
default: llvm_unreachable("Invalid opcode");
case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break;
case X86::MULX32Hrm: NewOpc = X86::MULX32rr; break;
case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break;
case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break;
case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break;
}

2
test/CodeGen/X86/bug80500.ll
View File

@ -8,7 +8,7 @@ define i32 @load_fold_udiv1(i32* %p) {
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl $-2004318071, %edx # imm = 0x88888889
; CHECK-NEXT: mulxl %eax, %eax, %eax
; CHECK-NEXT: mulxl (%eax), %eax, %eax
; CHECK-NEXT: shrl $3, %eax
; CHECK-NEXT: retl
%v = load i32, i32* %p, align 4