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[GISel][NFC]: Move getOpcodeDef from the LegalizationArtifactCombiner into GlobalISel/Utils for use elsewhere
llvm-svn: 318350
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0f6b54159f
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@ -36,8 +36,8 @@ public:
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SmallVectorImpl<MachineInstr *> &DeadInsts) {
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if (MI.getOpcode() != TargetOpcode::G_ANYEXT)
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return false;
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if (MachineInstr *DefMI =
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getOpcodeDef(TargetOpcode::G_TRUNC, MI.getOperand(1).getReg())) {
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if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC,
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MI.getOperand(1).getReg(), MRI)) {
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DEBUG(dbgs() << ".. Combine MI: " << MI;);
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unsigned DstReg = MI.getOperand(0).getReg();
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unsigned SrcReg = DefMI->getOperand(1).getReg();
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@ -55,8 +55,8 @@ public:
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if (MI.getOpcode() != TargetOpcode::G_ZEXT)
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return false;
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if (MachineInstr *DefMI =
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getOpcodeDef(TargetOpcode::G_TRUNC, MI.getOperand(1).getReg())) {
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if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC,
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MI.getOperand(1).getReg(), MRI)) {
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unsigned DstReg = MI.getOperand(0).getReg();
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LLT DstTy = MRI.getType(DstReg);
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if (isInstUnsupported(TargetOpcode::G_AND, DstTy) ||
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@ -83,8 +83,8 @@ public:
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if (MI.getOpcode() != TargetOpcode::G_SEXT)
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return false;
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if (MachineInstr *DefMI =
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getOpcodeDef(TargetOpcode::G_TRUNC, MI.getOperand(1).getReg())) {
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if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC,
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MI.getOperand(1).getReg(), MRI)) {
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unsigned DstReg = MI.getOperand(0).getReg();
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LLT DstTy = MRI.getType(DstReg);
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if (isInstUnsupported(TargetOpcode::G_SHL, DstTy) ||
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@ -118,7 +118,7 @@ public:
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return false;
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if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF,
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MI.getOperand(1).getReg())) {
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MI.getOperand(1).getReg(), MRI)) {
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unsigned DstReg = MI.getOperand(0).getReg();
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LLT DstTy = MRI.getType(DstReg);
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if (isInstUnsupported(TargetOpcode::G_IMPLICIT_DEF, DstTy))
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@ -248,23 +248,6 @@ private:
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return Action.first == LegalizerInfo::LegalizeAction::Unsupported ||
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Action.first == LegalizerInfo::LegalizeAction::NotFound;
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}
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/// See if Reg is defined by an single def instruction that is
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/// Opcode. Also try to do trivial folding if it's a COPY with
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/// same types. Returns null otherwise.
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MachineInstr *getOpcodeDef(unsigned Opcode, unsigned Reg) {
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auto *DefMI = MRI.getVRegDef(Reg);
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auto DstTy = MRI.getType(DefMI->getOperand(0).getReg());
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if (!DstTy.isValid())
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return nullptr;
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while (DefMI->getOpcode() == TargetOpcode::COPY) {
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unsigned SrcReg = DefMI->getOperand(1).getReg();
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auto SrcTy = MRI.getType(SrcReg);
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if (!SrcTy.isValid() || SrcTy != DstTy)
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break;
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DefMI = MRI.getVRegDef(SrcReg);
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}
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return DefMI->getOpcode() == Opcode ? DefMI : nullptr;
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}
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};
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} // namespace llvm
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@ -79,5 +79,11 @@ Optional<int64_t> getConstantVRegVal(unsigned VReg,
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const ConstantFP* getConstantFPVRegVal(unsigned VReg,
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const MachineRegisterInfo &MRI);
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/// See if Reg is defined by an single def instruction that is
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/// Opcode. Also try to do trivial folding if it's a COPY with
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/// same types. Returns null otherwise.
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MachineInstr *getOpcodeDef(unsigned Opcode, unsigned Reg,
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const MachineRegisterInfo &MRI);
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} // End namespace llvm.
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#endif
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@ -129,3 +129,19 @@ const llvm::ConstantFP* llvm::getConstantFPVRegVal(unsigned VReg,
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return nullptr;
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return MI->getOperand(1).getFPImm();
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}
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llvm::MachineInstr *llvm::getOpcodeDef(unsigned Opcode, unsigned Reg,
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const MachineRegisterInfo &MRI) {
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auto *DefMI = MRI.getVRegDef(Reg);
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auto DstTy = MRI.getType(DefMI->getOperand(0).getReg());
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if (!DstTy.isValid())
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return nullptr;
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while (DefMI->getOpcode() == TargetOpcode::COPY) {
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unsigned SrcReg = DefMI->getOperand(1).getReg();
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auto SrcTy = MRI.getType(SrcReg);
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if (!SrcTy.isValid() || SrcTy != DstTy)
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break;
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DefMI = MRI.getVRegDef(SrcReg);
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}
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return DefMI->getOpcode() == Opcode ? DefMI : nullptr;
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}
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