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[GISel][NFC]: Move getOpcodeDef from the LegalizationArtifactCombiner into GlobalISel/Utils for use elsewhere

llvm-svn: 318350
This commit is contained in:
Aditya Nandakumar 2017-11-15 23:45:04 +00:00
parent 0f6b54159f
commit a6c4884cb1
3 changed files with 29 additions and 24 deletions

View File

@ -36,8 +36,8 @@ public:
SmallVectorImpl<MachineInstr *> &DeadInsts) {
if (MI.getOpcode() != TargetOpcode::G_ANYEXT)
return false;
if (MachineInstr *DefMI =
getOpcodeDef(TargetOpcode::G_TRUNC, MI.getOperand(1).getReg())) {
if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC,
MI.getOperand(1).getReg(), MRI)) {
DEBUG(dbgs() << ".. Combine MI: " << MI;);
unsigned DstReg = MI.getOperand(0).getReg();
unsigned SrcReg = DefMI->getOperand(1).getReg();
@ -55,8 +55,8 @@ public:
if (MI.getOpcode() != TargetOpcode::G_ZEXT)
return false;
if (MachineInstr *DefMI =
getOpcodeDef(TargetOpcode::G_TRUNC, MI.getOperand(1).getReg())) {
if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC,
MI.getOperand(1).getReg(), MRI)) {
unsigned DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg);
if (isInstUnsupported(TargetOpcode::G_AND, DstTy) ||
@ -83,8 +83,8 @@ public:
if (MI.getOpcode() != TargetOpcode::G_SEXT)
return false;
if (MachineInstr *DefMI =
getOpcodeDef(TargetOpcode::G_TRUNC, MI.getOperand(1).getReg())) {
if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC,
MI.getOperand(1).getReg(), MRI)) {
unsigned DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg);
if (isInstUnsupported(TargetOpcode::G_SHL, DstTy) ||
@ -118,7 +118,7 @@ public:
return false;
if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF,
MI.getOperand(1).getReg())) {
MI.getOperand(1).getReg(), MRI)) {
unsigned DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg);
if (isInstUnsupported(TargetOpcode::G_IMPLICIT_DEF, DstTy))
@ -248,23 +248,6 @@ private:
return Action.first == LegalizerInfo::LegalizeAction::Unsupported ||
Action.first == LegalizerInfo::LegalizeAction::NotFound;
}
/// See if Reg is defined by an single def instruction that is
/// Opcode. Also try to do trivial folding if it's a COPY with
/// same types. Returns null otherwise.
MachineInstr *getOpcodeDef(unsigned Opcode, unsigned Reg) {
auto *DefMI = MRI.getVRegDef(Reg);
auto DstTy = MRI.getType(DefMI->getOperand(0).getReg());
if (!DstTy.isValid())
return nullptr;
while (DefMI->getOpcode() == TargetOpcode::COPY) {
unsigned SrcReg = DefMI->getOperand(1).getReg();
auto SrcTy = MRI.getType(SrcReg);
if (!SrcTy.isValid() || SrcTy != DstTy)
break;
DefMI = MRI.getVRegDef(SrcReg);
}
return DefMI->getOpcode() == Opcode ? DefMI : nullptr;
}
};
} // namespace llvm

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@ -79,5 +79,11 @@ Optional<int64_t> getConstantVRegVal(unsigned VReg,
const ConstantFP* getConstantFPVRegVal(unsigned VReg,
const MachineRegisterInfo &MRI);
/// See if Reg is defined by an single def instruction that is
/// Opcode. Also try to do trivial folding if it's a COPY with
/// same types. Returns null otherwise.
MachineInstr *getOpcodeDef(unsigned Opcode, unsigned Reg,
const MachineRegisterInfo &MRI);
} // End namespace llvm.
#endif

View File

@ -129,3 +129,19 @@ const llvm::ConstantFP* llvm::getConstantFPVRegVal(unsigned VReg,
return nullptr;
return MI->getOperand(1).getFPImm();
}
llvm::MachineInstr *llvm::getOpcodeDef(unsigned Opcode, unsigned Reg,
const MachineRegisterInfo &MRI) {
auto *DefMI = MRI.getVRegDef(Reg);
auto DstTy = MRI.getType(DefMI->getOperand(0).getReg());
if (!DstTy.isValid())
return nullptr;
while (DefMI->getOpcode() == TargetOpcode::COPY) {
unsigned SrcReg = DefMI->getOperand(1).getReg();
auto SrcTy = MRI.getType(SrcReg);
if (!SrcTy.isValid() || SrcTy != DstTy)
break;
DefMI = MRI.getVRegDef(SrcReg);
}
return DefMI->getOpcode() == Opcode ? DefMI : nullptr;
}