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Add various coarse bit-width architecture predicates to llvm::Triple.

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These are very useful for frontends and other utilities reasoning about
or selecting between triples.

llvm-svn: 149353
This commit is contained in:
Chandler Carruth 2012-01-31 04:52:32 +00:00
parent 96d5f62396
commit a71c1f9470
3 changed files with 125 additions and 0 deletions
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19
include/llvm/ADT/Triple.h
View File

@ -241,6 +241,25 @@ public:
/// @name Convenience Predicates
/// @{
/// \brief Test whether the architecture is 64-bit
///
/// Note that this tests for 64-bit pointer width, and nothing else. Note
/// that we intentionally expose only three predicates, 64-bit, 32-bit, and
/// 16-bit. The inner details of pointer width for particular architectures
/// is not summed up in the triple, and so only a coarse grained predicate
/// system is provided.
bool isArch64Bit() const;
/// \brief Test whether the architecture is 32-bit
///
/// Note that this tests for 32-bit pointer width, and nothing else.
bool isArch32Bit() const;
/// \brief Test whether the architecture is 16-bit
///
/// Note that this tests for 16-bit pointer width, and nothing else.
bool isArch16Bit() const;
/// isOSVersionLT - Helper function for doing comparisons against version
/// numbers included in the target triple.
bool isOSVersionLT(unsigned Major, unsigned Minor = 0,

49
lib/Support/Triple.cpp
View File

@ -665,3 +665,52 @@ void Triple::setEnvironmentName(StringRef Str) {
void Triple::setOSAndEnvironmentName(StringRef Str) {
setTriple(getArchName() + "-" + getVendorName() + "-" + Str);
}
static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
switch (Arch) {
case llvm::Triple::UnknownArch:
case llvm::Triple::InvalidArch:
return 0;
case llvm::Triple::msp430:
return 16;
case llvm::Triple::amdil:
case llvm::Triple::arm:
case llvm::Triple::cellspu:
case llvm::Triple::hexagon:
case llvm::Triple::le32:
case llvm::Triple::mblaze:
case llvm::Triple::mips:
case llvm::Triple::mipsel:
case llvm::Triple::ppc:
case llvm::Triple::ptx32:
case llvm::Triple::sparc:
case llvm::Triple::tce:
case llvm::Triple::thumb:
case llvm::Triple::x86:
case llvm::Triple::xcore:
return 32;
case llvm::Triple::mips64:
case llvm::Triple::mips64el:
case llvm::Triple::ppc64:
case llvm::Triple::ptx64:
case llvm::Triple::sparcv9:
case llvm::Triple::x86_64:
return 64;
}
llvm_unreachable("Invalid architecture value");
}
bool Triple::isArch64Bit() const {
return getArchPointerBitWidth(getArch()) == 64;
}
bool Triple::isArch32Bit() const {
return getArchPointerBitWidth(getArch()) == 32;
}
bool Triple::isArch16Bit() const {
return getArchPointerBitWidth(getArch()) == 16;
}

57
unittests/ADT/TripleTest.cpp
View File

@ -267,4 +267,61 @@ TEST(TripleTest, MutateName) {
}
TEST(TripleTest, BitWidthPredicates) {
Triple T;
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::InvalidArch);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::arm);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::hexagon);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::mips);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::mips64);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit());
T.setArch(Triple::msp430);
EXPECT_TRUE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::ppc);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::ppc64);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit());
T.setArch(Triple::x86);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::x86_64);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit());
}
}