1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00

[NFC][SCEV] Add tests for @llvm.abs intrinsic

This commit is contained in:
Roman Lebedev 2020-09-21 17:01:11 +03:00
parent 93c97aff7a
commit a776b0a84c

View File

@ -0,0 +1,27 @@
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
; RUN: opt -analyze -enable-new-pm=0 -scalar-evolution < %s | FileCheck %s
; RUN: opt -disable-output "-passes=print<scalar-evolution>" < %s 2>&1 | FileCheck %s
declare i32 @llvm.abs.i32(i32, i1)
define i32 @abs_nonsw(i32 %x) {
; CHECK-LABEL: 'abs_nonsw'
; CHECK-NEXT: Classifying expressions for: @abs_nonsw
; CHECK-NEXT: %r = call i32 @llvm.abs.i32(i32 %x, i1 false)
; CHECK-NEXT: --> %r U: full-set S: full-set
; CHECK-NEXT: Determining loop execution counts for: @abs_nonsw
;
%r = call i32 @llvm.abs.i32(i32 %x, i1 0)
ret i32 %r
}
define i32 @abs_nsw(i32 %x) {
; CHECK-LABEL: 'abs_nsw'
; CHECK-NEXT: Classifying expressions for: @abs_nsw
; CHECK-NEXT: %r = call i32 @llvm.abs.i32(i32 %x, i1 true)
; CHECK-NEXT: --> %r U: [0,-2147483648) S: full-set
; CHECK-NEXT: Determining loop execution counts for: @abs_nsw
;
%r = call i32 @llvm.abs.i32(i32 %x, i1 1)
ret i32 %r
}