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ARM assembly parsing and encoding updates.
Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS. llvm-svn: 135817
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@ -2153,7 +2153,7 @@ StringRef ARMAsmParser::SplitMnemonic(StringRef Mnemonic,
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// First, split out any predication code. Ignore mnemonics we know aren't
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// predicated but do have a carry-set and so weren't caught above.
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if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" &&
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Mnemonic != "muls" && Mnemonic != "smlals") {
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Mnemonic != "muls" && Mnemonic != "smlals" && Mnemonic != "smulls") {
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unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2))
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.Case("eq", ARMCC::EQ)
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.Case("ne", ARMCC::NE)
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@ -1550,6 +1550,36 @@ _func:
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@ CHECK: smuadlt r2, r3, r4 @ encoding: [0x13,0xf4,0x02,0xb7]
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@ CHECK: smuadxge r3, r2, r1 @ encoding: [0x32,0xf1,0x03,0xa7]
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@------------------------------------------------------------------------------
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@ SMULBB/SMLALBT/SMLALTB/SMLALTT
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@------------------------------------------------------------------------------
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smulbb r3, r9, r0
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smulbt r5, r4, r1
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smultb r4, r2, r2
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smultt r8, r3, r4
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smulbbge r1, r9, r0
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smulbtle r5, r6, r4
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smultbne r2, r3, r2
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smultteq r8, r3, r4
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@ CHECK: smulbb r3, r9, r0 @ encoding: [0x89,0x00,0x63,0xe1]
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@ CHECK: smulbt r5, r4, r1 @ encoding: [0xc4,0x01,0x65,0xe1]
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@ CHECK: smultb r4, r2, r2 @ encoding: [0xa2,0x02,0x64,0xe1]
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@ CHECK: smultt r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0xe1]
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@ CHECK: smulbbge r1, r9, r0 @ encoding: [0x89,0x00,0x61,0xa1]
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@ CHECK: smulbtle r5, r6, r4 @ encoding: [0xc6,0x04,0x65,0xd1]
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@ CHECK: smultbne r2, r3, r2 @ encoding: [0xa3,0x02,0x62,0x11]
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@ CHECK: smultteq r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0x01]
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@------------------------------------------------------------------------------
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@ SMULL
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@------------------------------------------------------------------------------
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smull r3, r9, r0, r1
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smulls r3, r9, r0, r2
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smulleq r8, r3, r4, r5
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smullseq r8, r3, r4, r3
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@------------------------------------------------------------------------------
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@ STM*
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@------------------------------------------------------------------------------
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