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[NFC][X86] Add BEXTR test with load and 33-bit mask (PR43381 / D67875)

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llvm-svn: 372524
This commit is contained in:
Roman Lebedev 2019-09-22 19:36:38 +00:00
parent 44e3baa609
commit a8217101c5
1 changed files with 29 additions and 0 deletions
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29
test/CodeGen/X86/bmi-x86_64.ll
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@ -102,6 +102,35 @@ entry:
ret i64 %and
}
define i64 @bextr64d_load(i64* %aptr) {
; BMI1-SLOW-LABEL: bextr64d_load:
; BMI1-SLOW: # %bb.0: # %entry
; BMI1-SLOW-NEXT: movq (%rdi), %rax
; BMI1-SLOW-NEXT: shrq $2, %rax
; BMI1-SLOW-NEXT: movl $8448, %ecx # imm = 0x2100
; BMI1-SLOW-NEXT: bextrq %rcx, %rax, %rax
; BMI1-SLOW-NEXT: retq
;
; BMI2-SLOW-LABEL: bextr64d_load:
; BMI2-SLOW: # %bb.0: # %entry
; BMI2-SLOW-NEXT: movq (%rdi), %rax
; BMI2-SLOW-NEXT: shrq $2, %rax
; BMI2-SLOW-NEXT: movb $33, %cl
; BMI2-SLOW-NEXT: bzhiq %rcx, %rax, %rax
; BMI2-SLOW-NEXT: retq
;
; BEXTR-FAST-LABEL: bextr64d_load:
; BEXTR-FAST: # %bb.0: # %entry
; BEXTR-FAST-NEXT: movl $8450, %eax # imm = 0x2102
; BEXTR-FAST-NEXT: bextrq %rax, (%rdi), %rax
; BEXTR-FAST-NEXT: retq
entry:
%a = load i64, i64* %aptr, align 8
%shr = lshr i64 %a, 2
%and = and i64 %shr, 8589934591
ret i64 %and
}
define i64 @non_bextr64(i64 %x) {
; CHECK-LABEL: non_bextr64:
; CHECK: # %bb.0: # %entry