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[X86] Improve optimizeCompareInstr for signed comparisons after ANDN instructions

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Extend D94856 to handle 'andn' instructions as well
This commit is contained in:
Simon Pilgrim 2021-04-06 14:15:59 +01:00
parent 06d35436b7
commit a8f69b86a0
2 changed files with 3 additions and 5 deletions
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4
lib/Target/X86/X86InstrInfo.cpp
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@ -4039,8 +4039,6 @@ inline static bool isDefConvertible(const MachineInstr &MI, bool &NoSignFlag,
case X86::SAR8r1: case X86::SAR16r1: case X86::SAR32r1:case X86::SAR64r1:
case X86::SHR8r1: case X86::SHR16r1: case X86::SHR32r1:case X86::SHR64r1:
case X86::SHL8r1: case X86::SHL16r1: case X86::SHL32r1:case X86::SHL64r1:
case X86::ANDN32rr: case X86::ANDN32rm:
case X86::ANDN64rr: case X86::ANDN64rm:
case X86::BZHI32rr: case X86::BZHI32rm:
case X86::BZHI64rr: case X86::BZHI64rm:
case X86::LZCNT16rr: case X86::LZCNT16rm:
@ -4053,6 +4051,8 @@ inline static bool isDefConvertible(const MachineInstr &MI, bool &NoSignFlag,
case X86::TZCNT32rr: case X86::TZCNT32rm:
case X86::TZCNT64rr: case X86::TZCNT64rm:
return true;
case X86::ANDN32rr: case X86::ANDN32rm:
case X86::ANDN64rr: case X86::ANDN64rm:
case X86::BLSI32rr: case X86::BLSI32rm:
case X86::BLSI64rr: case X86::BLSI64rm:
case X86::BLSMSK32rr: case X86::BLSMSK32rm:

4
test/CodeGen/X86/bmi.ll
View File

@ -309,20 +309,18 @@ define i1 @andn_cmp_i8(i8 %x, i8 %y) {
ret i1 %cmp
}
; FIXME: PR48768 - 'andn' clears the overflow flag, so we don't need a separate 'test'.
; PR48768 - 'andn' clears the overflow flag, so we don't need a separate 'test'.
define i1 @andn_cmp_i32_overflow(i32 %x, i32 %y) {
; X86-LABEL: andn_cmp_i32_overflow:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andnl {{[0-9]+}}(%esp), %eax, %eax
; X86-NEXT: testl %eax, %eax
; X86-NEXT: setle %al
; X86-NEXT: retl
;
; X64-LABEL: andn_cmp_i32_overflow:
; X64: # %bb.0:
; X64-NEXT: andnl %edi, %esi, %eax
; X64-NEXT: testl %eax, %eax
; X64-NEXT: setle %al
; X64-NEXT: retq
%noty = xor i32 %y, -1