mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 03:33:20 +01:00
Do not use MEMBARRIER_MCR for any Thumb code.
It is only supported for ARM code. Normally Thumb2 code would use DMB instead, but depending on how the compiler is invoked (e.g., -mattr=-db) that might be disabled. This prevents a "cannot select MEMBARRIER_MCR" error in that situation. Radar 8644195 llvm-svn: 118642
This commit is contained in:
parent
63cfae801d
commit
a933ce4caa
@ -553,7 +553,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
|
||||
// ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use
|
||||
// the default expansion.
|
||||
if (Subtarget->hasDataBarrier() ||
|
||||
(Subtarget->hasV6Ops() && !Subtarget->isThumb1Only())) {
|
||||
(Subtarget->hasV6Ops() && !Subtarget->isThumb())) {
|
||||
// membarrier needs custom lowering; the rest are legal and handled
|
||||
// normally.
|
||||
setOperationAction(ISD::MEMBARRIER, MVT::Other, Custom);
|
||||
@ -2040,7 +2040,7 @@ static SDValue LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG,
|
||||
// Some ARMv6 cpus can support data barriers with an mcr instruction.
|
||||
// Thumb1 and pre-v6 ARM mode use a libcall instead and should never get
|
||||
// here.
|
||||
assert(Subtarget->hasV6Ops() && !Subtarget->isThumb1Only() &&
|
||||
assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() &&
|
||||
"Unexpected ISD::MEMBARRIER encountered. Should be libcall!");
|
||||
return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0),
|
||||
DAG.getConstant(0, MVT::i32));
|
||||
|
@ -1,4 +1,5 @@
|
||||
; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=V6
|
||||
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=-db | FileCheck %s -check-prefix=V6
|
||||
; RUN: llc < %s -march=thumb -mattr=+v6m | FileCheck %s -check-prefix=V6M
|
||||
|
||||
declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1)
|
||||
|
Loading…
Reference in New Issue
Block a user