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add optional input flag to FMRRD
llvm-svn: 30774
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54301ca490
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@ -284,8 +284,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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Ops.push_back(DAG.getRegister(Reg2, MVT::i32));
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SDVTList VTs = DAG.getVTList(MVT::Other, MVT::Flag);
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SDOperand Ops[] = {Chain, SDReg1, SDReg2, Arg}; //missing flag
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Chain = DAG.getNode(ARMISD::FMRRD, VTs, Ops, 4);
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SDOperand Ops[] = {Chain, SDReg1, SDReg2, Arg, InFlag};
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Chain = DAG.getNode(ARMISD::FMRRD, VTs, Ops, InFlag.Val ? 5 : 4);
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} else {
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if (VT == MVT::f32)
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Arg = DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Arg);
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@ -78,7 +78,8 @@ def armfsitos : SDNode<"ARMISD::FSITOS", SDTUnaryOp>;
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def armfsitod : SDNode<"ARMISD::FSITOD", SDTUnaryOp>;
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def SDTarmfmrrd : SDTypeProfile<0, 3, [SDTCisInt<0>, SDTCisInt<1>, SDTCisFP<2>]>;
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def armfmrrd : SDNode<"ARMISD::FMRRD", SDTarmfmrrd, [SDNPHasChain, SDNPOutFlag]>;
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def armfmrrd : SDNode<"ARMISD::FMRRD", SDTarmfmrrd,
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[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
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def SDTarmfmdrr : SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisInt<1>, SDTCisInt<2>]>;
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def armfmdrr : SDNode<"ARMISD::FMDRR", SDTarmfmdrr, []>;
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