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Add support for Thumb2 literal loads with negative zero offset

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Thumb2 literal loads use an offset encoding which allows for 
negative zero. This fixes parsing and encoding so that #-0 
is correctly processed. The parser represents #-0 as INT32_MIN.

llvm-svn: 188549
This commit is contained in:
Mihai Popa 2013-08-16 12:03:00 +00:00
parent cbf5f426e7
commit a9e072fd76
3 changed files with 16 additions and 4 deletions
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2
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -1793,8 +1793,6 @@ public:
void addMemPCRelImm12Operands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
int32_t Imm = Memory.OffsetImm->getValue();
// FIXME: Handle #-0
if (Imm == INT32_MIN) Imm = 0;
Inst.addOperand(MCOperand::CreateImm(Imm));
}

6
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
View File

@ -778,8 +778,10 @@ getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,
} else {
Reg = ARM::PC;
int32_t Offset = MO.getImm();
// FIXME: Handle #-0.
if (Offset < 0) {
if (Offset == INT32_MIN) {
Offset = 0;
isAdd = false;
} else if (Offset < 0) {
Offset *= -1;
isAdd = false;
}

12
test/MC/ARM/basic-thumb2-instructions.s
View File

@ -830,6 +830,18 @@ _func:
@ CHECK: ldr.w pc, [pc, #256] @ encoding: [0xdf,0xf8,0x00,0xf1]
@ CHECK: ldr.w pc, [pc, #-400] @ encoding: [0x5f,0xf8,0x90,0xf1]
ldrb r9, [pc, #-0]
ldrsb r11, [pc, #-0]
ldrh r10, [pc, #-0]
ldrsh r1, [pc, #-0]
ldr r5, [pc, #-0]
@ CHECK: ldrb.w r9, [pc, #-0] @ encoding: [0x1f,0xf8,0x00,0x90]
@ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0]
@ CHECK: ldrh.w r10, [pc, #-0] @ encoding: [0x3f,0xf8,0x00,0xa0]
@ CHECK: ldrsh.w r1, [pc, #-0] @ encoding: [0x3f,0xf9,0x00,0x10]
@ CHECK: ldr.w r5, [pc, #-0] @ encoding: [0x5f,0xf8,0x00,0x50]
@------------------------------------------------------------------------------
@ LDR(register)
@------------------------------------------------------------------------------