RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
Code Issues Projects Releases Wiki Activity

Update tests for 84931.

Browse Source 
llvm-svn: 84932
This commit is contained in:
Evan Cheng 2009-10-23 05:58:34 +00:00
parent 0db11ae5a2
commit aa03d9926d
7 changed files with 14 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
test/CodeGen/X86/2007-01-08-InstrSched.ll
View File

@ -11,12 +11,12 @@ define float @foo(float %x) nounwind {
%tmp14 = fadd float %tmp12, %tmp7
ret float %tmp14
; CHECK: mulss LCPI1_0(%rip)
; CHECK-NEXT: mulss LCPI1_1(%rip)
; CHECK-NEXT: addss
; CHECK: mulss LCPI1_3(%rip)
; CHECK-NEXT: mulss LCPI1_0(%rip)
; CHECK-NEXT: mulss LCPI1_1(%rip)
; CHECK-NEXT: mulss LCPI1_2(%rip)
; CHECK-NEXT: addss
; CHECK-NEXT: addss
; CHECK-NEXT: addss
; CHECK-NEXT: ret
}

8
test/CodeGen/X86/sse2.ll
View File

@ -10,10 +10,10 @@ define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
; CHECK: t1:
; CHECK: movl 8(%esp), %eax
; CHECK-NEXT: movl 4(%esp), %ecx
; CHECK-NEXT: movapd (%eax), %xmm0
; CHECK-NEXT: movl 4(%esp), %eax
; CHECK-NEXT: movlpd 12(%esp), %xmm0
; CHECK-NEXT: movapd %xmm0, (%eax)
; CHECK-NEXT: movapd %xmm0, (%ecx)
; CHECK-NEXT: ret
}
@ -26,9 +26,9 @@ define void @t2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
; CHECK: t2:
; CHECK: movl 8(%esp), %eax
; CHECK-NEXT: movl 4(%esp), %ecx
; CHECK-NEXT: movapd (%eax), %xmm0
; CHECK-NEXT: movl 4(%esp), %eax
; CHECK-NEXT: movhpd 12(%esp), %xmm0
; CHECK-NEXT: movapd %xmm0, (%eax)
; CHECK-NEXT: movapd %xmm0, (%ecx)
; CHECK-NEXT: ret
}

4
test/CodeGen/X86/sse3.ll
View File

@ -168,11 +168,11 @@ define internal void @t10() nounwind {
ret void
; X64: t10:
; X64: pextrw $4, %xmm0, %eax
; X64: pextrw $6, %xmm0, %edx
; X64: movlhps %xmm1, %xmm1
; X64: pshuflw $8, %xmm1, %xmm1
; X64: pinsrw $2, %eax, %xmm1
; X64: pextrw $6, %xmm0, %eax
; X64: pinsrw $3, %eax, %xmm1
; X64: pinsrw $3, %edx, %xmm1
}

2
test/CodeGen/X86/vshift-1.ll
View File

@ -63,7 +63,7 @@ entry:
; CHECK: shift3b:
; CHECK: movzwl
; CHECK: movd
; CHECK: psllw
; CHECK-NEXT: psllw
%0 = insertelement <8 x i16> undef, i16 %amt, i32 0
%1 = insertelement <8 x i16> %0, i16 %amt, i32 1
%2 = insertelement <8 x i16> %0, i16 %amt, i32 2

2
test/CodeGen/X86/vshift-2.ll
View File

@ -63,7 +63,7 @@ entry:
; CHECK: shift3b:
; CHECK: movzwl
; CHECK: movd
; CHECK: psrlw
; CHECK-NEXT: psrlw
%0 = insertelement <8 x i16> undef, i16 %amt, i32 0
%1 = insertelement <8 x i16> %0, i16 %amt, i32 1
%2 = insertelement <8 x i16> %0, i16 %amt, i32 2

2
test/CodeGen/X86/vshift-3.ll
View File

@ -52,7 +52,7 @@ entry:
; CHECK: shift3b:
; CHECK: movzwl
; CHECK: movd
; CHECK: psraw
; CHECK-NEXT: psraw
%0 = insertelement <8 x i16> undef, i16 %amt, i32 0
%1 = insertelement <8 x i16> %0, i16 %amt, i32 1
%2 = insertelement <8 x i16> %0, i16 %amt, i32 2

4
test/CodeGen/X86/vshift-5.ll
View File

@ -6,7 +6,7 @@ define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
entry:
; CHECK: shift5a:
; CHECK: movd
; CHECK: pslld
; CHECK-NEXT: pslld
%amt = load i32* %pamt
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
%shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
@ -20,7 +20,7 @@ define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
entry:
; CHECK: shift5b:
; CHECK: movd
; CHECK: psrad
; CHECK-NEXT: psrad
%amt = load i32* %pamt
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
%shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer