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[X86] Update X86_INTR calling convention to save ZMM registers instead of YMM registers when AVX512 is enabled.
llvm-svn: 269017
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@ -899,8 +899,9 @@ def CSR_64_AllRegs : CalleeSavedRegs<(add CSR_64_MostRegs, RAX, RSP,
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def CSR_64_AllRegs_AVX : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX, RSP,
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(sequence "YMM%u", 0, 15)),
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(sequence "XMM%u", 0, 15))>;
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def CSR_64_AllRegs_AVX512 : CalleeSavedRegs<(add CSR_64_AllRegs_AVX,
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(sequence "YMM%u", 16, 31))>;
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def CSR_64_AllRegs_AVX512 : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX, RSP,
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(sequence "ZMM%u", 0, 31)),
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(sequence "XMM%u", 0, 15))>;
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// Standard C + YMM6-15
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def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
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@ -3,10 +3,10 @@
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; Make sure we spill the high numbered YMM registers with the right encoding.
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; CHECK-LABEL: foo
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; CHECK: movups %ymm31, {{.+}}
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; CHECK: encoding: [0x62,0x61,0x7c,0x28,0x11,0xbc,0x24,0xf0,0x03,0x00,0x00]
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; ymm30 is used as an anchor for the previous regexp.
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; CHECK-NEXT: movups %ymm30
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; CHECK: movups %zmm31, {{.+}}
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; CHECK: encoding: [0x62,0x61,0x7c,0x48,0x11,0xbc,0x24,0x10,0x08,0x00,0x00]
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; zmm30 is used as an anchor for the previous regexp.
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; CHECK-NEXT: movups %zmm30
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; CHECK: call
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; CHECK: iret
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