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https://github.com/RPCS3/llvm-mirror.git
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[ARM GlobalISel] Legalize G_FPTOSI and G_FPTOUI
Legal if we have hardware support for floating point, libcalls otherwise. Also add the necessary support for libcalls in the legalizer helper. llvm-svn: 323726
This commit is contained in:
Diana Picus
parent
b776be76d7
commit
aa88b3cc07
@ -150,6 +150,10 @@ static RTLIB::Libcall getConvRTLibDesc(unsigned Opcode, Type *ToType,
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return RTLIB::getFPEXT(FromMVT, ToMVT);
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case TargetOpcode::G_FPTRUNC:
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return RTLIB::getFPROUND(FromMVT, ToMVT);
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case TargetOpcode::G_FPTOSI:
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return RTLIB::getFPTOSINT(FromMVT, ToMVT);
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case TargetOpcode::G_FPTOUI:
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return RTLIB::getFPTOUINT(FromMVT, ToMVT);
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}
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llvm_unreachable("Unsupported libcall function");
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}
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@ -220,6 +224,20 @@ LegalizerHelper::libcall(MachineInstr &MI) {
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return Status;
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break;
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}
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case TargetOpcode::G_FPTOSI:
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case TargetOpcode::G_FPTOUI: {
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// FIXME: Support other types
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unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits();
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unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
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if (ToSize != 32 || (FromSize != 32 && FromSize != 64))
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return UnableToLegalize;
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LegalizeResult Status = conversionLibcall(
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MI, MIRBuilder, Type::getInt32Ty(Ctx),
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FromSize == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx));
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if (Status != Legalized)
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return Status;
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break;
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}
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}
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MI.eraseFromParent();
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@ -134,9 +134,6 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
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setAction({G_PTRTOINT, s32}, Legal);
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setAction({G_PTRTOINT, 1, p0}, Legal);
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setAction({G_FPTOSI, s32}, Legal);
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setAction({G_FPTOSI, 1, s32}, Legal);
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for (unsigned Op : {G_ASHR, G_LSHR, G_SHL})
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setAction({Op, s32}, Legal);
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@ -189,6 +186,12 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
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setAction({G_FPTRUNC, s32}, Legal);
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setAction({G_FPTRUNC, 1, s64}, Legal);
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for (unsigned Op : {G_FPTOSI, G_FPTOUI}) {
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setAction({Op, s32}, Legal);
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for (auto Ty : {s32, s64})
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setAction({Op, 1, Ty}, Legal);
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}
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} else {
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for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
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for (auto Ty : {s32, s64})
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@ -209,6 +212,12 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
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setAction({G_FPTRUNC, s32}, Legal);
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setAction({G_FPTRUNC, 1, s64}, Libcall);
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for (unsigned Op : {G_FPTOSI, G_FPTOUI}) {
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setAction({Op, s32}, Legal);
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setAction({Op, 1, s32}, Libcall);
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setAction({Op, 1, s64}, Libcall);
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}
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if (AEABI(ST))
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setFCmpLibcallsAEABI();
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else
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@ -29,6 +29,11 @@
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define void @test_fpext_float_to_double() { ret void }
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define void @test_fptrunc_double_to_float() { ret void }
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define void @test_fptosi_float() { ret void }
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define void @test_fptosi_double() { ret void }
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define void @test_fptoui_float() { ret void }
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define void @test_fptoui_double() { ret void }
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define void @test_fcmp_true_s32() { ret void }
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define void @test_fcmp_false_s32() { ret void }
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@ -812,6 +817,144 @@ body: |
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%r0 = COPY %3(s32)
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BX_RET 14, %noreg, implicit %r0
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---
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---
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name: test_fptosi_float
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# CHECK-LABEL: name: test_fptosi_float
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.0:
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liveins: %r0
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; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY %r0
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%0(s32) = COPY %r0
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; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOSI [[X]]
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; SOFT-NOT: G_FPTOSI
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r0 = COPY [[X]]
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; SOFT-AEABI: BL &__aeabi_f2iz, {{.*}}, implicit %r0, implicit-def %r0
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; SOFT-DEFAULT: BL &__fixsfsi, {{.*}}, implicit %r0, implicit-def %r0
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; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0
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; SOFT: ADJCALLSTACKUP
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; SOFT-NOT: G_FPTOSI
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%1(s32) = G_FPTOSI %0(s32)
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; CHECK: %r0 = COPY [[R]]
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%r0 = COPY %1(s32)
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BX_RET 14, %noreg, implicit %r0
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...
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---
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name: test_fptosi_double
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# CHECK-LABEL: name: test_fptosi_double
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY %r0
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; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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; HARD: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]]
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%2(s64) = G_MERGE_VALUES %0(s32), %1(s32)
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; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOSI [[X]]
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; SOFT-NOT: G_FPTOSI
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X0]]
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]]
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; SOFT-AEABI: BL &__aeabi_d2iz, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT-DEFAULT: BL &__fixdfsi, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0
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; SOFT: ADJCALLSTACKUP
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; SOFT-NOT: G_FPTOSI
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%3(s32) = G_FPTOSI %2(s64)
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; CHECK: %r0 = COPY [[R]](s32)
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%r0 = COPY %3(s32)
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BX_RET 14, %noreg, implicit %r0
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...
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---
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name: test_fptoui_float
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# CHECK-LABEL: name: test_fptoui_float
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.0:
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liveins: %r0
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; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY %r0
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%0(s32) = COPY %r0
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; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOUI [[X]]
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; SOFT-NOT: G_FPTOUI
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r0 = COPY [[X]]
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; SOFT-AEABI: BL &__aeabi_f2uiz, {{.*}}, implicit %r0, implicit-def %r0
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; SOFT-DEFAULT: BL &__fixunssfsi, {{.*}}, implicit %r0, implicit-def %r0
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; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0
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; SOFT: ADJCALLSTACKUP
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; SOFT-NOT: G_FPTOUI
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%1(s32) = G_FPTOUI %0(s32)
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; CHECK: %r0 = COPY [[R]]
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%r0 = COPY %1(s32)
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BX_RET 14, %noreg, implicit %r0
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...
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---
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name: test_fptoui_double
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# CHECK-LABEL: name: test_fptoui_double
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY %r0
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; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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; HARD: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]]
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%2(s64) = G_MERGE_VALUES %0(s32), %1(s32)
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; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOUI [[X]]
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; SOFT-NOT: G_FPTOUI
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X0]]
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]]
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; SOFT-AEABI: BL &__aeabi_d2uiz, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT-DEFAULT: BL &__fixunsdfsi, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT: [[R:%[0-9]+]]:_(s32) = COPY %r0
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; SOFT: ADJCALLSTACKUP
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; SOFT-NOT: G_FPTOUI
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%3(s32) = G_FPTOUI %2(s64)
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; CHECK: %r0 = COPY [[R]](s32)
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%r0 = COPY %3(s32)
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BX_RET 14, %noreg, implicit %r0
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...
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...
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name: test_fcmp_true_s32
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# CHECK-LABEL: name: test_fcmp_true_s32
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