diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp
index 0687bd803e8..7a5f1cb1efd 100644
--- a/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -1414,7 +1414,7 @@ static SDValue emitConjunctionDisjunctionTreeRec(SelectionDAG &DAG, SDValue Val,
     return emitConditionalComparison(LHS, RHS, CC, CCOp, Predicate, OutCC, DL,
                                      DAG);
   }
-  assert(Opcode == ISD::AND || Opcode == ISD::OR && Val->hasOneUse()
+  assert(Opcode == ISD::AND || (Opcode == ISD::OR && Val->hasOneUse())
          && "Valid conjunction/disjunction tree");
 
   // Check if both sides can be transformed.