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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00

[ValueTracking] Add computeKnownBits DemandedElts support to masked add instructions (PR36319)

This commit is contained in:
Simon Pilgrim 2020-03-18 21:49:58 +00:00
parent 35af785b71
commit ab2d09da1b
2 changed files with 5 additions and 21 deletions

View File

@ -1121,7 +1121,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
if (!Known.Zero[0] && !Known.One[0] &&
match(I, m_c_BinOp(m_Value(X), m_Add(m_Deferred(X), m_Value(Y))))) {
Known2.resetAll();
computeKnownBits(Y, Known2, Depth + 1, Q);
computeKnownBits(Y, DemandedElts, Known2, Depth + 1, Q);
if (Known2.countMinTrailingOnes() > 0)
Known.Zero.setBit(0);
}

View File

@ -13,11 +13,7 @@ define i1 @test1(i32 %a) {
define i1 @test1v(<2 x i32> %a) {
; CHECK-LABEL: @test1v(
; CHECK-NEXT: [[RHS:%.*]] = add <2 x i32> [[A:%.*]], <i32 -1, i32 0>
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[A]], [[RHS]]
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i32> [[AND]], i32 0
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[EXT]], 1
; CHECK-NEXT: ret i1 [[RES]]
; CHECK-NEXT: ret i1 false
;
%rhs = add <2 x i32> %a, <i32 -1, i32 0>
%and = and <2 x i32> %a, %rhs
@ -38,11 +34,7 @@ define i1 @test2(i32 %a) {
define i1 @test2v(<2 x i32> %a) {
; CHECK-LABEL: @test2v(
; CHECK-NEXT: [[RHS:%.*]] = add <2 x i32> [[A:%.*]], <i32 0, i32 1>
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[A]], [[RHS]]
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i32> [[AND]], i32 1
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[EXT]], 1
; CHECK-NEXT: ret i1 [[RES]]
; CHECK-NEXT: ret i1 false
;
%rhs = add <2 x i32> %a, <i32 0, i32 1>
%and = and <2 x i32> %a, %rhs
@ -63,11 +55,7 @@ define i1 @test3(i32 %a) {
define i1 @test3v(<2 x i32> %a) {
; CHECK-LABEL: @test3v(
; CHECK-NEXT: [[RHS:%.*]] = add <2 x i32> [[A:%.*]], <i32 7, i32 0>
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[A]], [[RHS]]
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i32> [[AND]], i32 0
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[EXT]], 1
; CHECK-NEXT: ret i1 [[RES]]
; CHECK-NEXT: ret i1 false
;
%rhs = add <2 x i32> %a, <i32 7, i32 0>
%and = and <2 x i32> %a, %rhs
@ -140,11 +128,7 @@ define i1 @test6(i32 %a) {
define i1 @test6v(<2 x i32> %a) {
; CHECK-LABEL: @test6v(
; CHECK-NEXT: [[LHS:%.*]] = add <2 x i32> [[A:%.*]], <i32 0, i32 -1>
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[LHS]], [[A]]
; CHECK-NEXT: [[EXT:%.*]] = extractelement <2 x i32> [[AND]], i32 1
; CHECK-NEXT: [[RES:%.*]] = icmp eq i32 [[EXT]], 1
; CHECK-NEXT: ret i1 [[RES]]
; CHECK-NEXT: ret i1 false
;
%lhs = add <2 x i32> %a, <i32 0, i32 -1>
%and = and <2 x i32> %lhs, %a