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[InstCombine] canonicalize add/sub with bool
add A, sext(B) --> sub A, zext(B) We have to choose 1 of these forms, so I'm opting for the zext because that's easier for value tracking. The backend should be prepared for this change after: D57401 rL353433 This is also a preliminary step towards reducing the amount of bit hackery that we do in IR to optimize icmp/select. That should be waiting to happen at a later optimization stage. The seeming regression in the fuzzer test was discussed in: D58359 We were only managing that fold in instcombine by luck, and other passes should be able to deal with that better anyway. llvm-svn: 354748
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@ -1118,6 +1118,12 @@ Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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return BinaryOperator::CreateSub(RHS, A);
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}
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// Canonicalize sext to zext for better value tracking potential.
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// add A, sext(B) --> sub A, zext(B)
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if (match(&I, m_c_Add(m_Value(A), m_OneUse(m_SExt(m_Value(B))))) &&
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B->getType()->isIntOrIntVectorTy(1))
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return BinaryOperator::CreateSub(A, Builder.CreateZExt(B, Ty));
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// A + -B --> A - B
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if (match(RHS, m_Neg(m_Value(B))))
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return BinaryOperator::CreateSub(LHS, B);
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@ -25,8 +25,7 @@ define <2 x i32> @select_0_or_1_from_bool_vec(<2 x i1> %x) {
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define i32 @select_C_minus_1_or_C_from_bool(i1 %x) {
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; CHECK-LABEL: @select_C_minus_1_or_C_from_bool(
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; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[X:%.*]] to i32
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[EXT]], 42
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; CHECK-NEXT: [[ADD:%.*]] = select i1 [[X:%.*]], i32 41, i32 42
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%ext = sext i1 %x to i32
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@ -36,8 +35,7 @@ define i32 @select_C_minus_1_or_C_from_bool(i1 %x) {
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define <2 x i32> @select_C_minus_1_or_C_from_bool_vec(<2 x i1> %x) {
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; CHECK-LABEL: @select_C_minus_1_or_C_from_bool_vec(
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; CHECK-NEXT: [[EXT:%.*]] = sext <2 x i1> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[ADD:%.*]] = add nsw <2 x i32> [[EXT]], <i32 42, i32 43>
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; CHECK-NEXT: [[ADD:%.*]] = select <2 x i1> [[X:%.*]], <2 x i32> <i32 41, i32 42>, <2 x i32> <i32 42, i32 43>
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; CHECK-NEXT: ret <2 x i32> [[ADD]]
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;
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%ext = sext <2 x i1> %x to <2 x i32>
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@ -531,7 +531,11 @@ define i40 @test26(i40 %A) {
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; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=9880
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define i177 @ossfuzz_9880(i177 %X) {
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; CHECK-LABEL: @ossfuzz_9880(
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; CHECK-NEXT: ret i177 1
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; CHECK-NEXT: [[A:%.*]] = alloca i177, align 8
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; CHECK-NEXT: [[L1:%.*]] = load i177, i177* [[A]], align 8
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i177 [[L1]], 0
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; CHECK-NEXT: [[B1:%.*]] = zext i1 [[TMP1]] to i177
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; CHECK-NEXT: ret i177 [[B1]]
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;
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%A = alloca i177
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%L1 = load i177, i177* %A
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@ -515,10 +515,10 @@ define <4 x i32> @vec_sel_xor(<4 x i32> %a, <4 x i32> %b, <4 x i1> %c) {
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define <4 x i32> @vec_sel_xor_multi_use(<4 x i32> %a, <4 x i32> %b, <4 x i1> %c) {
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; CHECK-LABEL: @vec_sel_xor_multi_use(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <4 x i1> [[C:%.*]], <i1 true, i1 false, i1 false, i1 false>
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; CHECK-NEXT: [[MASK_FLIP1:%.*]] = sext <4 x i1> [[TMP1]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = xor <4 x i1> [[C]], <i1 false, i1 true, i1 true, i1 true>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP2]], <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
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; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[TMP3]], [[MASK_FLIP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = zext <4 x i1> [[TMP1]] to <4 x i32>
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; CHECK-NEXT: [[ADD:%.*]] = sub <4 x i32> [[TMP3]], [[TMP4]]
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; CHECK-NEXT: ret <4 x i32> [[ADD]]
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;
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%mask = sext <4 x i1> %c to <4 x i32>
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@ -694,8 +694,8 @@ define i32 @test41(i1 %cond, i32 %x, i32 %y) {
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define i32 @test42(i32 %x, i32 %y) {
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; CHECK-LABEL: @test42(
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; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[X:%.*]], 0
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; CHECK-NEXT: [[B:%.*]] = sext i1 [[COND]] to i32
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; CHECK-NEXT: [[C:%.*]] = add i32 [[B]], [[Y:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[COND]] to i32
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; CHECK-NEXT: [[C:%.*]] = sub i32 [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[C]]
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;
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%b = add i32 %y, -1
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@ -707,8 +707,8 @@ define i32 @test42(i32 %x, i32 %y) {
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define <2 x i32> @test42vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @test42vec(
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; CHECK-NEXT: [[COND:%.*]] = icmp eq <2 x i32> [[X:%.*]], zeroinitializer
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; CHECK-NEXT: [[B:%.*]] = sext <2 x i1> [[COND]] to <2 x i32>
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; CHECK-NEXT: [[C:%.*]] = add <2 x i32> [[B]], [[Y:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> [[COND]] to <2 x i32>
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; CHECK-NEXT: [[C:%.*]] = sub <2 x i32> [[Y:%.*]], [[TMP1]]
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; CHECK-NEXT: ret <2 x i32> [[C]]
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;
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%b = add <2 x i32> %y, <i32 -1, i32 -1>
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@ -5,9 +5,9 @@
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define i32 @a(i1 zeroext %x, i1 zeroext %y) {
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; CHECK-LABEL: @a(
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; CHECK-NEXT: [[CONV3_NEG:%.*]] = sext i1 [[Y:%.*]] to i32
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; CHECK-NEXT: [[SUB:%.*]] = select i1 [[X:%.*]], i32 2, i32 1
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], [[CONV3_NEG]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[Y:%.*]] to i32
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; CHECK-NEXT: [[ADD:%.*]] = sub nsw i32 [[SUB]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%conv = zext i1 %x to i32
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@ -317,8 +317,8 @@ define i8 @sext_sub_nuw(i8 %x, i1 %y) {
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define i32 @sextbool_add(i1 %c, i32 %x) {
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; CHECK-LABEL: @sextbool_add(
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; CHECK-NEXT: [[B:%.*]] = sext i1 [[C:%.*]] to i32
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; CHECK-NEXT: [[S:%.*]] = add i32 [[B]], [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[C:%.*]] to i32
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; CHECK-NEXT: [[S:%.*]] = sub i32 [[X:%.*]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[S]]
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;
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%b = sext i1 %c to i32
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@ -329,8 +329,8 @@ define i32 @sextbool_add(i1 %c, i32 %x) {
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define i32 @sextbool_add_commute(i1 %c, i32 %px) {
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; CHECK-LABEL: @sextbool_add_commute(
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; CHECK-NEXT: [[X:%.*]] = urem i32 [[PX:%.*]], 42
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; CHECK-NEXT: [[B:%.*]] = sext i1 [[C:%.*]] to i32
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; CHECK-NEXT: [[S:%.*]] = add nsw i32 [[X]], [[B]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[C:%.*]] to i32
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; CHECK-NEXT: [[S:%.*]] = sub nsw i32 [[X]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[S]]
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;
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%x = urem i32 %px, 42 ; thwart complexity-based canonicalization
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@ -358,8 +358,8 @@ define i32 @sextbool_add_uses(i1 %c, i32 %x) {
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define <4 x i32> @sextbool_add_vector(<4 x i1> %c, <4 x i32> %x) {
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; CHECK-LABEL: @sextbool_add_vector(
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; CHECK-NEXT: [[B:%.*]] = sext <4 x i1> [[C:%.*]] to <4 x i32>
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; CHECK-NEXT: [[S:%.*]] = add <4 x i32> [[B]], [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i1> [[C:%.*]] to <4 x i32>
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; CHECK-NEXT: [[S:%.*]] = sub <4 x i32> [[X:%.*]], [[TMP1]]
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; CHECK-NEXT: ret <4 x i32> [[S]]
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;
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%b = sext <4 x i1> %c to <4 x i32>
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