diff --git a/lib/Target/ARM/ARMFrameLowering.cpp b/lib/Target/ARM/ARMFrameLowering.cpp
index 5428bd6c94b..cb98b2b34ef 100644
--- a/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/lib/Target/ARM/ARMFrameLowering.cpp
@@ -2424,7 +2424,8 @@ void ARMFrameLowering::adjustForSegmentedStacks(
   } else {
     // Get TLS base address from the coprocessor
     // mrc p15, #0, SR0, c13, c0, #3
-    BuildMI(McrMBB, DL, TII.get(ARM::MRC), ScratchReg0)
+    BuildMI(McrMBB, DL, TII.get(Thumb ? ARM::t2MRC : ARM::MRC),
+            ScratchReg0)
         .addImm(15)
         .addImm(0)
         .addImm(13)
@@ -2438,7 +2439,8 @@ void ARMFrameLowering::adjustForSegmentedStacks(
 
     // Get the stack limit from the right offset
     // ldr SR0, [sr0, #4 * TlsOffset]
-    BuildMI(GetMBB, DL, TII.get(ARM::LDRi12), ScratchReg0)
+    BuildMI(GetMBB, DL, TII.get(Thumb ? ARM::t2LDRi12 : ARM::LDRi12),
+            ScratchReg0)
         .addReg(ScratchReg0)
         .addImm(4 * TlsOffset)
         .add(predOps(ARMCC::AL));
diff --git a/test/CodeGen/Thumb2/segmented-stacks.ll b/test/CodeGen/Thumb2/segmented-stacks.ll
index 49627fb7c3c..ee4dd0186b3 100644
--- a/test/CodeGen/Thumb2/segmented-stacks.ll
+++ b/test/CodeGen/Thumb2/segmented-stacks.ll
@@ -1,34 +1,70 @@
-; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-android
-; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -filetype=obj
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=THUMB
+; RUN: llc < %s -mtriple=arm-linux-androideabi -mcpu=arm1156t2-s -verify-machineinstrs | FileCheck %s -check-prefix=ARM
 
 
 ; Just to prevent the alloca from being optimized away
 declare void @dummy_use(i32*, i32)
 
 define void @test_basic() #0 {
-        %mem = alloca i32, i32 10
-        call void @dummy_use (i32* %mem, i32 10)
-	ret void
-
-; Thumb-android:      test_basic:
-
-; Thumb-android:      push    {r4, r5}
-; Thumb-android-NEXT: mrc     p15, #0, r4, c13, c0, #3
-; Thumb-android-NEXT: mov     r5, sp
-; Thumb-android-NEXT: ldr     r4, [r4, #252]
-; Thumb-android-NEXT: cmp     r4, r5
-; Thumb-android-NEXT: blo     .LBB0_2
-
-; Thumb-android:      mov     r4, #48
-; Thumb-android-NEXT: mov     r5, #0
-; Thumb-android-NEXT: push    {lr}
-; Thumb-android-NEXT: bl      __morestack
-; Thumb-android-NEXT: ldr     lr, [sp], #4
-; Thumb-android-NEXT: pop     {r4, r5}
-; Thumb-android-NEXT: bx      lr
-
-; Thumb-android:      pop     {r4, r5}
-
+; THUMB-LABEL: test_basic:
+; THUMB:       @ %bb.0:
+; THUMB-NEXT:    push {r4, r5}
+; THUMB-NEXT:    mrc p15, #0, r4, c13, c0, #3
+; THUMB-NEXT:    mov r5, sp
+; THUMB-NEXT:    ldr.w r4, [r4, #252]
+; THUMB-NEXT:    cmp r4, r5
+; THUMB-NEXT:    blo .LBB0_2
+; THUMB-NEXT:  @ %bb.1:
+; THUMB-NEXT:    mov r4, #48
+; THUMB-NEXT:    mov r5, #0
+; THUMB-NEXT:    push {lr}
+; THUMB-NEXT:    bl __morestack
+; THUMB-NEXT:    ldr lr, [sp], #4
+; THUMB-NEXT:    pop {r4, r5}
+; THUMB-NEXT:    bx lr
+; THUMB-NEXT:  .LBB0_2:
+; THUMB-NEXT:    pop {r4, r5}
+; THUMB-NEXT:    .save {r7, lr}
+; THUMB-NEXT:    push {r7, lr}
+; THUMB-NEXT:    .pad #40
+; THUMB-NEXT:    sub sp, #40
+; THUMB-NEXT:    mov r0, sp
+; THUMB-NEXT:    movs r1, #10
+; THUMB-NEXT:    bl dummy_use
+; THUMB-NEXT:    add sp, #40
+; THUMB-NEXT:    pop {r7, pc}
+;
+; ARM-LABEL: test_basic:
+; ARM:       @ %bb.0:
+; ARM-NEXT:    push {r4, r5}
+; ARM-NEXT:    mrc p15, #0, r4, c13, c0, #3
+; ARM-NEXT:    mov r5, sp
+; ARM-NEXT:    ldr r4, [r4, #252]
+; ARM-NEXT:    cmp r4, r5
+; ARM-NEXT:    blo .LBB0_2
+; ARM-NEXT:  @ %bb.1:
+; ARM-NEXT:    mov r4, #48
+; ARM-NEXT:    mov r5, #0
+; ARM-NEXT:    stmdb sp!, {lr}
+; ARM-NEXT:    bl __morestack
+; ARM-NEXT:    ldm sp!, {lr}
+; ARM-NEXT:    pop {r4, r5}
+; ARM-NEXT:    bx lr
+; ARM-NEXT:  .LBB0_2:
+; ARM-NEXT:    pop {r4, r5}
+; ARM-NEXT:    .save {r11, lr}
+; ARM-NEXT:    push {r11, lr}
+; ARM-NEXT:    .pad #40
+; ARM-NEXT:    sub sp, sp, #40
+; ARM-NEXT:    mov r0, sp
+; ARM-NEXT:    mov r1, #10
+; ARM-NEXT:    bl dummy_use
+; ARM-NEXT:    add sp, sp, #40
+; ARM-NEXT:    pop {r11, pc}
+  %mem = alloca i32, i32 10
+  call void @dummy_use (i32* %mem, i32 10)
+  ret void
 }
 
 attributes #0 = { "split-stack" }