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Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding.

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llvm-svn: 118600
This commit is contained in:
Jim Grosbach 2010-11-09 18:43:54 +00:00
parent a08bcc13b3
commit abe68922ca
1 changed files with 2 additions and 0 deletions
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2
lib/Target/ARM/ARMInstrInfo.td
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@ -851,6 +851,7 @@ multiclass AI_ldr1<bit opc22, string opc, InstrItinClass iii,
bits<17> shift;
let Inst{23} = shift{12}; // U (add = ('U' == 1))
let Inst{19-16} = shift{16-13}; // Rn
let Inst{15-12} = Rt;
let Inst{11-0} = shift{11-0};
}
}
@ -879,6 +880,7 @@ multiclass AI_str1<bit opc22, string opc, InstrItinClass iii,
bits<17> shift;
let Inst{23} = shift{12}; // U (add = ('U' == 1))
let Inst{19-16} = shift{16-13}; // Rn
let Inst{15-12} = Rt;
let Inst{11-0} = shift{11-0};
}
}