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GlobalISel: Allow legalizing G_FADD to a libcall
Use the same handling in the generic legalizer code as for the other libcalls (G_FREM, G_FPOW). Enable it on ARM for float and double so we can test it. llvm-svn: 299931
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@ -66,6 +66,9 @@ void LegalizerHelper::extractParts(unsigned Reg, LLT Ty, int NumParts,
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static RTLIB::Libcall getRTLibDesc(unsigned Opcode, unsigned Size) {
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switch (Opcode) {
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case TargetOpcode::G_FADD:
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assert((Size == 32 || Size == 64) && "Unsupported size");
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return Size == 64 ? RTLIB::ADD_F64 : RTLIB::ADD_F32;
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case TargetOpcode::G_FREM:
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return Size == 64 ? RTLIB::REM_F64 : RTLIB::REM_F32;
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case TargetOpcode::G_FPOW:
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@ -83,6 +86,7 @@ LegalizerHelper::libcall(MachineInstr &MI) {
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switch (MI.getOpcode()) {
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default:
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return UnableToLegalize;
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case TargetOpcode::G_FADD:
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case TargetOpcode::G_FPOW:
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case TargetOpcode::G_FREM: {
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auto &Ctx = MIRBuilder.getMF().getFunction()->getContext();
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@ -63,6 +63,9 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
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setAction({G_LOAD, s64}, Legal);
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setAction({G_STORE, s64}, Legal);
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} else {
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for (auto Ty : {s32, s64})
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setAction({G_FADD, Ty}, Libcall);
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}
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for (unsigned Op : {G_FREM, G_FPOW})
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@ -1,6 +1,6 @@
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; RUN: llc -mtriple arm-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel %s -o - | FileCheck %s
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; RUN: llc -mtriple arm-- -mattr=+vfp2 -float-abi=soft -global-isel %s -o - | FileCheck %s
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; RUN: llc -mtriple arm-- -float-abi=soft -global-isel %s -o - | FileCheck %s
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; RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD
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; RUN: llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT-AEABI
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; RUN: llc -mtriple arm-linux-gnu- -mattr=+vfp2,+soft-float -float-abi=soft -global-isel %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT-DEFAULT
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define arm_aapcscc float @test_frem_float(float %x, float %y) {
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; CHECK-LABEL: test_frem_float:
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@ -31,3 +31,21 @@ define arm_aapcscc double @test_fpow_double(double %x, double %y) {
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%r = call double @llvm.pow.f64(double %x, double %y)
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ret double %r
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}
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define arm_aapcscc float @test_add_float(float %x, float %y) {
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; CHECK-LABEL: test_add_float:
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; HARD: vadd.f32
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; SOFT-AEABI: blx __aeabi_fadd
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; SOFT-DEFAULT: blx __addsf3
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%r = fadd float %x, %y
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ret float %r
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}
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define arm_aapcscc double @test_add_double(double %x, double %y) {
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; CHECK-LABEL: test_add_double:
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; HARD: vadd.f64
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; SOFT-AEABI: blx __aeabi_dadd
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; SOFT-DEFAULT: blx __adddf3
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%r = fadd double %x, %y
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ret double %r
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}
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@ -1,12 +1,15 @@
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# RUN: llc -mtriple arm-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD
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# RUN: llc -mtriple arm-- -mattr=+vfp2 -float-abi=soft -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT
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# RUN: llc -mtriple arm-- -float-abi=soft -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT
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# RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD
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# RUN: llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-AEABI
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# RUN: llc -mtriple arm-linux-gnu -mattr=+soft-float -float-abi=soft -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-DEFAULT
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--- |
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define void @test_frem_float() { ret void }
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define void @test_frem_double() { ret void }
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define void @test_fpow_float() { ret void }
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define void @test_fpow_double() { ret void }
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define void @test_fadd_float() { ret void }
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define void @test_fadd_double() { ret void }
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...
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---
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name: test_frem_float
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@ -192,3 +195,88 @@ body: |
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%r1 = COPY %8(s32)
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BX_RET 14, _, implicit %r0, implicit %r1
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...
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---
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name: test_fadd_float
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# CHECK-LABEL: name: test_fadd_float
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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; CHECK-DAG: [[X:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[Y:%[0-9]+]](s32) = COPY %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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; HARD: [[R:%[0-9]+]](s32) = G_FADD [[X]], [[Y]]
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r0 = COPY [[X]]
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; SOFT-DAG: %r1 = COPY [[Y]]
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; SOFT-AEABI: BLX $__aeabi_fadd, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT-DEFAULT: BLX $__addsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT: [[R:%[0-9]+]](s32) = COPY %r0
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; SOFT: ADJCALLSTACKUP
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%2(s32) = G_FADD %0, %1
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; CHECK: %r0 = COPY [[R]]
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%r0 = COPY %2(s32)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_fadd_double
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# CHECK-LABEL: name: test_fadd_double
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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- { id: 7, class: _ }
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- { id: 8, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1, %r2, %r3
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; CHECK-DAG: [[X0:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[X1:%[0-9]+]](s32) = COPY %r1
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; CHECK-DAG: [[Y0:%[0-9]+]](s32) = COPY %r2
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; CHECK-DAG: [[Y1:%[0-9]+]](s32) = COPY %r3
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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%2(s32) = COPY %r2
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%3(s32) = COPY %r3
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; HARD-DAG: [[X:%[0-9]+]](s64) = G_SEQUENCE [[X0]]
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; HARD-DAG: [[Y:%[0-9]+]](s64) = G_SEQUENCE [[Y0]]
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%4(s64) = G_SEQUENCE %0(s32), 0, %1(s32), 32
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%5(s64) = G_SEQUENCE %2(s32), 0, %3(s32), 32
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; HARD: [[R:%[0-9]+]](s64) = G_FADD [[X]], [[Y]]
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X0]]
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]]
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; SOFT-AEABI: BLX $__aeabi_dadd, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1
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; SOFT-DEFAULT: BLX $__adddf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1
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; SOFT: ADJCALLSTACKUP
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%6(s64) = G_FADD %4, %5
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; HARD-DAG: G_EXTRACT [[R]](s64), 0
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; HARD-DAG: G_EXTRACT [[R]](s64), 32
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%7(s32) = G_EXTRACT %6(s64), 0
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%8(s32) = G_EXTRACT %6(s64), 32
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%r0 = COPY %7(s32)
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%r1 = COPY %8(s32)
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BX_RET 14, _, implicit %r0, implicit %r1
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...
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