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Fix typos

llvm-svn: 210135
This commit is contained in:
Matt Arsenault 2014-06-03 23:06:13 +00:00
parent 4164797aa0
commit ad098591b8
2 changed files with 8 additions and 8 deletions

View File

@ -1297,7 +1297,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
int32_t Immediate = Desc->getSize() == 4 ? 0 : -1; int32_t Immediate = Desc->getSize() == 4 ? 0 : -1;
bool HaveVSrc = false, HaveSSrc = false; bool HaveVSrc = false, HaveSSrc = false;
// First figure out what we alread have in this instruction // First figure out what we already have in this instruction.
for (unsigned i = 0, e = Node->getNumOperands(), Op = NumDefs; for (unsigned i = 0, e = Node->getNumOperands(), Op = NumDefs;
i != e && Op < NumOps; ++i, ++Op) { i != e && Op < NumOps; ++i, ++Op) {
@ -1316,7 +1316,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
} }
} }
// If we neither have VSrc nor SSrc it makes no sense to continue // If we neither have VSrc nor SSrc, it makes no sense to continue.
if (!HaveVSrc && !HaveSSrc) if (!HaveVSrc && !HaveSSrc)
return Node; return Node;
@ -1332,17 +1332,17 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
const SDValue &Operand = Node->getOperand(i); const SDValue &Operand = Node->getOperand(i);
Ops.push_back(Operand); Ops.push_back(Operand);
// Already folded immediate ? // Already folded immediate?
if (isa<ConstantSDNode>(Operand.getNode()) || if (isa<ConstantSDNode>(Operand.getNode()) ||
isa<ConstantFPSDNode>(Operand.getNode())) isa<ConstantFPSDNode>(Operand.getNode()))
continue; continue;
// Is this a VSrc or SSrc operand ? // Is this a VSrc or SSrc operand?
unsigned RegClass = Desc->OpInfo[Op].RegClass; unsigned RegClass = Desc->OpInfo[Op].RegClass;
if (isVSrc(RegClass) || isSSrc(RegClass)) { if (isVSrc(RegClass) || isSSrc(RegClass)) {
// Try to fold the immediates // Try to fold the immediates
if (!foldImm(Ops[i], Immediate, ScalarSlotUsed)) { if (!foldImm(Ops[i], Immediate, ScalarSlotUsed)) {
// Folding didn't worked, make sure we don't hit the SReg limit // Folding didn't work, make sure we don't hit the SReg limit.
ensureSRegLimit(DAG, Ops[i], RegClass, ScalarSlotUsed); ensureSRegLimit(DAG, Ops[i], RegClass, ScalarSlotUsed);
} }
continue; continue;
@ -1535,7 +1535,7 @@ void SITargetLowering::adjustWritemask(MachineSDNode *&Node,
} }
} }
/// \brief Fold the instructions after slecting them /// \brief Fold the instructions after selecting them.
SDNode *SITargetLowering::PostISelFolding(MachineSDNode *Node, SDNode *SITargetLowering::PostISelFolding(MachineSDNode *Node,
SelectionDAG &DAG) const { SelectionDAG &DAG) const {
const SIInstrInfo *TII = const SIInstrInfo *TII =

View File

@ -731,8 +731,8 @@ unsigned SIInstrInfo::buildExtractSubReg(MachineBasicBlock::iterator MI,
unsigned SubReg = MRI.createVirtualRegister(SubRC); unsigned SubReg = MRI.createVirtualRegister(SubRC);
// Just in case the super register is itself a sub-register, copy it to a new // Just in case the super register is itself a sub-register, copy it to a new
// value so we don't need to wory about merging its subreg index with the // value so we don't need to worry about merging its subreg index with the
// SubIdx passed to this function. The register coalescer should be able to // SubIdx passed to this function. The register coalescer should be able to
// eliminate this extra copy. // eliminate this extra copy.
BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), get(TargetOpcode::COPY), BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), get(TargetOpcode::COPY),
NewSuperReg) NewSuperReg)