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Complete support for two-address pass rematerialization. Now *almost* always a win.
llvm-svn: 52452
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e447be0532
commit
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@ -40,6 +40,8 @@
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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@ -49,9 +51,10 @@ STATISTIC(NumTwoAddressInstrs, "Number of two-address instructions");
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STATISTIC(NumCommuted , "Number of instructions commuted to coalesce");
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STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address");
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STATISTIC(Num3AddrSunk, "Number of 3-address instructions sunk");
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STATISTIC(NumReMats, "Number of instructions re-materialized");
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static cl::opt<bool>
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EnableReMat("2-addr-remat", cl::init(false), cl::Hidden,
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EnableReMat("two-addr-remat", cl::init(false), cl::Hidden,
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cl::desc("Two-addr conversion should remat when possible."));
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namespace {
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@ -65,6 +68,12 @@ namespace {
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bool Sink3AddrInstruction(MachineBasicBlock *MBB, MachineInstr *MI,
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unsigned Reg,
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MachineBasicBlock::iterator OldPos);
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bool isSafeToReMat(unsigned DstReg, MachineInstr *MI);
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bool isProfitableToReMat(unsigned Reg, const TargetRegisterClass *RC,
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MachineInstr *MI, unsigned Loc,
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MachineInstr *DefMI, MachineBasicBlock *MBB,
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DenseMap<MachineInstr*, unsigned> &DistanceMap);
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public:
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static char ID; // Pass identification, replacement for typeid
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TwoAddressInstructionPass() : MachineFunctionPass((intptr_t)&ID) {}
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@ -93,7 +102,6 @@ const PassInfo *const llvm::TwoAddressInstructionPassID = &X;
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/// three-address instruction to avoid clobbering a register. Try to sink it
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/// past the instruction that would kill the above mentioned register to reduce
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/// register pressure.
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///
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bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
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MachineInstr *MI, unsigned SavedReg,
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MachineBasicBlock::iterator OldPos) {
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@ -127,7 +135,6 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
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// Find the instruction that kills SavedReg.
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MachineInstr *KillMI = NULL;
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SavedReg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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MachineOperand &UseMO = UI.getOperand();
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@ -144,15 +151,18 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
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// position and the kill use, then it's not safe to sink it.
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//
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// FIXME: This can be sped up if there is an easy way to query whether an
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// instruction if before or after another instruction. Then we can use
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// instruction is before or after another instruction. Then we can use
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// MachineRegisterInfo def / use instead.
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MachineOperand *KillMO = NULL;
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MachineBasicBlock::iterator KillPos = KillMI;
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++KillPos;
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unsigned NumVisited = 0;
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for (MachineBasicBlock::iterator I = next(OldPos); I != KillPos; ++I) {
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MachineInstr *OtherMI = I;
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if (NumVisited > 30) // FIXME: Arbitrary limit to reduce compile time cost.
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return false;
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++NumVisited;
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for (unsigned i = 0, e = OtherMI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = OtherMI->getOperand(i);
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if (!MO.isRegister())
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@ -165,8 +175,8 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
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if (MO.isKill()) {
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if (OtherMI == KillMI && MOReg == SavedReg)
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// Save the operand that kills the register. We want unset the kill
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// marker is we can sink MI past it.
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// Save the operand that kills the register. We want to unset the kill
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// marker if we can sink MI past it.
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KillMO = &MO;
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else if (UseRegs.count(MOReg))
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// One of the uses is killed before the destination.
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@ -191,6 +201,80 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
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return true;
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}
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/// isSafeToReMat - Return true if it's safe to rematerialize the specified
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/// instruction which defined the specified register instead of copying it.
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bool
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TwoAddressInstructionPass::isSafeToReMat(unsigned DstReg, MachineInstr *MI) {
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const TargetInstrDesc &TID = MI->getDesc();
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if (!TID.isAsCheapAsAMove())
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return false;
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bool SawStore = false;
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if (!MI->isSafeToMove(TII, SawStore))
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return false;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (!MO.isRegister())
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continue;
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// FIXME: For now, do not remat any instruction with register operands.
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// Later on, we can loosen the restriction is the register operands have
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// not been modified between the def and use. Note, this is different from
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// MachineSink because the code in no longer in two-address form (at least
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// partially).
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if (MO.isUse())
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return false;
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else if (!MO.isDead() && MO.getReg() != DstReg)
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return false;
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}
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return true;
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}
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/// isTwoAddrUse - Return true if the specified MI is using the specified
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/// register as a two-address operand.
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static bool isTwoAddrUse(MachineInstr *UseMI, unsigned Reg) {
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const TargetInstrDesc &TID = UseMI->getDesc();
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for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
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MachineOperand &MO = UseMI->getOperand(i);
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if (MO.getReg() == Reg &&
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(MO.isDef() || TID.getOperandConstraint(i, TOI::TIED_TO) != -1))
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// Earlier use is a two-address one.
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return true;
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}
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return false;
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}
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/// isProfitableToReMat - Return true if the heuristics determines it is likely
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/// to be profitable to re-materialize the definition of Reg rather than copy
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/// the register.
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bool
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TwoAddressInstructionPass::isProfitableToReMat(unsigned Reg,
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const TargetRegisterClass *RC,
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MachineInstr *MI, unsigned Loc,
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MachineInstr *DefMI, MachineBasicBlock *MBB,
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DenseMap<MachineInstr*, unsigned> &DistanceMap) {
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if (DefMI->getParent() != MBB)
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return true;
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// If earlier uses in MBB are not two-address uses, then don't remat.
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bool OtherUse = false;
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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MachineOperand &UseMO = UI.getOperand();
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if (!UseMO.isUse())
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continue;
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MachineInstr *UseMI = UseMO.getParent();
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if (UseMI->getParent() != MBB)
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continue;
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DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
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if (DI != DistanceMap.end() && DI->second == Loc)
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continue; // Current use.
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OtherUse = true;
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// There is at least one other use in the MBB that will clobber the
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// register.
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if (isTwoAddrUse(UseMI, Reg))
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return true;
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}
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return !OtherUse;
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}
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/// runOnMachineFunction - Reduce two-address instructions to two operands.
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///
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bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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@ -206,16 +290,25 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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DOUT << "********** REWRITING TWO-ADDR INSTRS **********\n";
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DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
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SmallPtrSet<MachineInstr*, 8> ReMattedInstrs;
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// ReMatRegs - Keep track of the registers whose def's are remat'ed.
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BitVector ReMatRegs;
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ReMatRegs.resize(MRI->getLastVirtReg()+1);
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// DistanceMap - Keep track the distance of a MI from the start of the
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// current basic block.
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DenseMap<MachineInstr*, unsigned> DistanceMap;
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for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
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mbbi != mbbe; ++mbbi) {
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unsigned Dist = 0;
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DistanceMap.clear();
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for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
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mi != me; ) {
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MachineBasicBlock::iterator nmi = next(mi);
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const TargetInstrDesc &TID = mi->getDesc();
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bool FirstTied = true;
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DistanceMap.insert(std::make_pair(mi, ++Dist));
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for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
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int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
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if (ti == -1)
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@ -284,6 +377,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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mbbi->insert(mi, NewMI); // Insert the new inst
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mbbi->erase(mi); // Nuke the old inst.
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mi = NewMI;
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DistanceMap.insert(std::make_pair(NewMI, Dist));
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}
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++NumCommuted;
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@ -303,21 +397,23 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1);
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#endif
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if (MachineInstr *New=TII->convertToThreeAddress(mbbi, mi, *LV)) {
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MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, *LV);
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if (NewMI) {
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DOUT << "2addr: CONVERTING 2-ADDR: " << *mi;
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DOUT << "2addr: TO 3-ADDR: " << *New;
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DOUT << "2addr: TO 3-ADDR: " << *NewMI;
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bool Sunk = false;
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if (New->findRegisterUseOperand(regB, false, TRI))
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if (NewMI->findRegisterUseOperand(regB, false, TRI))
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// FIXME: Temporary workaround. If the new instruction doesn't
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// uses regB, convertToThreeAddress must have created more
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// then one instruction.
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Sunk = Sink3AddrInstruction(mbbi, New, regB, mi);
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Sunk = Sink3AddrInstruction(mbbi, NewMI, regB, mi);
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mbbi->erase(mi); // Nuke the old inst.
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if (!Sunk) {
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mi = New;
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DistanceMap.insert(std::make_pair(NewMI, Dist));
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mi = NewMI;
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nmi = next(mi);
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}
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@ -328,17 +424,17 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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}
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InstructionRearranged:
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const TargetRegisterClass* rc = MF.getRegInfo().getRegClass(regA);
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MachineInstr *Orig = MRI->getVRegDef(regB);
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const TargetInstrDesc &OrigTID = Orig->getDesc();
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bool SawStore = false;
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if (EnableReMat && Orig && Orig->isSafeToMove(TII, SawStore) &&
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OrigTID.isAsCheapAsAMove() && !OrigTID.mayLoad() &&
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!OrigTID.isSimpleLoad()) {
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DEBUG(cerr << "2addr: REMATTING : " << *Orig << "\n");
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TII->reMaterialize(*mbbi, mi, regA, Orig);
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ReMattedInstrs.insert(Orig);
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const TargetRegisterClass* rc = MRI->getRegClass(regA);
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MachineInstr *DefMI = MRI->getVRegDef(regB);
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// If it's safe and profitable, remat the definition instead of
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// copying it.
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if (EnableReMat && DefMI &&
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isSafeToReMat(regB, DefMI) &&
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isProfitableToReMat(regB, rc, mi, Dist, DefMI, mbbi,DistanceMap)){
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DEBUG(cerr << "2addr: REMATTING : " << *DefMI << "\n");
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TII->reMaterialize(*mbbi, mi, regA, DefMI);
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ReMatRegs.set(regB);
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++NumReMats;
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} else {
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TII->copyRegToReg(*mbbi, mi, regA, regB, rc, rc);
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}
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@ -378,33 +474,16 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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}
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if (EnableReMat) {
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// Check to see if the instructions that we rematerialized are now dead. If
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// they are, expunge them here.
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SmallPtrSet<MachineInstr*, 8>::iterator I = ReMattedInstrs.begin();
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SmallPtrSet<MachineInstr*, 8>::iterator E = ReMattedInstrs.end();
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for (; I != E; ++I) {
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MachineInstr *MI = *I;
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bool InstrDead = true;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isRegister())
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continue;
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unsigned MOReg = MO.getReg();
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if (!MOReg || !MO.isDef() || (MO.isImplicit() && MO.isDead()))
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continue;
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if (MRI->use_begin(MOReg) != MRI->use_end()) {
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InstrDead = false;
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break;
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}
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// Some remat'ed instructions are dead.
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int VReg = ReMatRegs.find_first();
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while (VReg != -1) {
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if (MRI->use_empty(VReg)) {
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MachineInstr *DefMI = MRI->getVRegDef(VReg);
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DefMI->eraseFromParent();
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}
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if (InstrDead)
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MI->eraseFromParent();
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VReg = ReMatRegs.find_next(VReg);
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}
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}
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return MadeChange;
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