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[AArch64][Falkor] Fix MOVZ sched predicate to not assert on non-imm operands (e.g. blockaddress).

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llvm-svn: 305752
This commit is contained in:
Geoff Berry 2017-06-19 21:57:44 +00:00
parent 3d87ec3654
commit ad34e35a7f
1 changed files with 2 additions and 1 deletions
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lib/Target/AArch64/AArch64SchedFalkorDetails.td
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@ -519,7 +519,8 @@ def FalkorReadIncSt : SchedReadAdvance<1, [FalkorWr_LdStInc_none_3cyc]>;
// SchedPredicates and WriteVariants for Immediate Zero and LSLFast/ASRFast
// -----------------------------------------------------------------------------
def FalkorImmZPred : SchedPredicate<[{MI->getOperand(1).getImm() == 0}]>;
def FalkorImmZPred : SchedPredicate<[{MI->getOperand(1).isImm() &&
MI->getOperand(1).getImm() == 0}]>;
def FalkorOp1ZrReg : SchedPredicate<[{MI->getOperand(1).getReg() == AArch64::WZR ||
MI->getOperand(1).getReg() == AArch64::XZR}]>;