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R600/SI: Add global atomicrmw sub
v2: Add separate offset/no-offset tests Signed-off-by: Aaron Watry <awatry@gmail.com> Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com> llvm-svn: 220104
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@ -387,6 +387,7 @@ class global_binary_atomic_op<SDNode atomic_op> : PatFrag<
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>;
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def atomic_add_global : global_binary_atomic_op<atomic_load_add>;
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def atomic_sub_global : global_binary_atomic_op<atomic_load_sub>;
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//===----------------------------------------------------------------------===//
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// Misc Pattern Fragments
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@ -900,7 +900,9 @@ defm BUFFER_STORE_DWORDX4 : MUBUF_Store_Helper <
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defm BUFFER_ATOMIC_ADD : MUBUF_Atomic <
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0x00000032, "BUFFER_ATOMIC_ADD", VReg_32, i32, atomic_add_global
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>;
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//def BUFFER_ATOMIC_SUB : MUBUF_ <0x00000033, "BUFFER_ATOMIC_SUB", []>;
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defm BUFFER_ATOMIC_SUB : MUBUF_Atomic <
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0x00000033, "BUFFER_ATOMIC_SUB", VReg_32, i32, atomic_sub_global
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>;
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//def BUFFER_ATOMIC_RSUB : MUBUF_ <0x00000034, "BUFFER_ATOMIC_RSUB", []>;
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//def BUFFER_ATOMIC_SMIN : MUBUF_ <0x00000035, "BUFFER_ATOMIC_SMIN", []>;
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//def BUFFER_ATOMIC_UMIN : MUBUF_ <0x00000036, "BUFFER_ATOMIC_UMIN", []>;
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@ -79,3 +79,83 @@ entry:
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store i32 %0, i32 addrspace(1)* %out2
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32_offset:
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; SI: BUFFER_ATOMIC_SUB v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:0x10{{$}}
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define void @atomic_sub_i32_offset(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%gep = getelementptr i32 addrspace(1)* %out, i32 4
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%0 = atomicrmw volatile sub i32 addrspace(1)* %gep, i32 %in seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32_ret_offset:
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; SI: BUFFER_ATOMIC_SUB [[RET:v[0-9]+]], s[{{[0-9]+}}:{{[0-9]+}}], 0 offset:0x10 glc {{$}}
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; SI: BUFFER_STORE_DWORD [[RET]]
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define void @atomic_sub_i32_ret_offset(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in) {
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entry:
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%gep = getelementptr i32 addrspace(1)* %out, i32 4
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%0 = atomicrmw volatile sub i32 addrspace(1)* %gep, i32 %in seq_cst
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store i32 %0, i32 addrspace(1)* %out2
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32_addr64_offset:
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; SI: BUFFER_ATOMIC_SUB v{{[0-9]+}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:0x10{{$}}
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define void @atomic_sub_i32_addr64_offset(i32 addrspace(1)* %out, i32 %in, i64 %index) {
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entry:
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%ptr = getelementptr i32 addrspace(1)* %out, i64 %index
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%gep = getelementptr i32 addrspace(1)* %ptr, i32 4
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%0 = atomicrmw volatile sub i32 addrspace(1)* %gep, i32 %in seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32_ret_addr64_offset:
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; SI: BUFFER_ATOMIC_SUB [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 offset:0x10 glc{{$}}
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; SI: BUFFER_STORE_DWORD [[RET]]
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define void @atomic_sub_i32_ret_addr64_offset(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in, i64 %index) {
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entry:
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%ptr = getelementptr i32 addrspace(1)* %out, i64 %index
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%gep = getelementptr i32 addrspace(1)* %ptr, i32 4
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%0 = atomicrmw volatile sub i32 addrspace(1)* %gep, i32 %in seq_cst
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store i32 %0, i32 addrspace(1)* %out2
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32:
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; SI: BUFFER_ATOMIC_SUB v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 0{{$}}
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define void @atomic_sub_i32(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = atomicrmw volatile sub i32 addrspace(1)* %out, i32 %in seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32_ret:
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; SI: BUFFER_ATOMIC_SUB [[RET:v[0-9]+]], s[{{[0-9]+}}:{{[0-9]+}}], 0 glc
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; SI: BUFFER_STORE_DWORD [[RET]]
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define void @atomic_sub_i32_ret(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in) {
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entry:
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%0 = atomicrmw volatile sub i32 addrspace(1)* %out, i32 %in seq_cst
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store i32 %0, i32 addrspace(1)* %out2
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32_addr64:
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; SI: BUFFER_ATOMIC_SUB v{{[0-9]+}}, v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64{{$}}
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define void @atomic_sub_i32_addr64(i32 addrspace(1)* %out, i32 %in, i64 %index) {
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entry:
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%ptr = getelementptr i32 addrspace(1)* %out, i64 %index
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%0 = atomicrmw volatile sub i32 addrspace(1)* %ptr, i32 %in seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}atomic_sub_i32_ret_addr64:
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; SI: BUFFER_ATOMIC_SUB [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}], s[{{[0-9]+}}:{{[0-9]+}}], 0 addr64 glc{{$}}
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; SI: BUFFER_STORE_DWORD [[RET]]
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define void @atomic_sub_i32_ret_addr64(i32 addrspace(1)* %out, i32 addrspace(1)* %out2, i32 %in, i64 %index) {
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entry:
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%ptr = getelementptr i32 addrspace(1)* %out, i64 %index
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%0 = atomicrmw volatile sub i32 addrspace(1)* %ptr, i32 %in seq_cst
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store i32 %0, i32 addrspace(1)* %out2
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ret void
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}
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