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AMDGPU: Lower addrspacecast to 32-bit constant
Somehow this was missing from the DAG path, but not global isel.
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@ -4941,6 +4941,10 @@ SDValue SITargetLowering::lowerADDRSPACECAST(SDValue Op,
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}
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}
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if (ASC->getDestAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT &&
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Src.getValueType() == MVT::i64)
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return DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, Src);
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// global <-> flat are no-ops and never emitted.
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const MachineFunction &MF = DAG.getMachineFunction();
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@ -106,6 +106,17 @@ define amdgpu_kernel void @use_constant_to_flat_addrspacecast(i32 addrspace(4)*
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ret void
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}
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; HSA-LABEl: {{^}}use_constant_to_global_addrspacecast:
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; HSA: s_load_dwordx2 s{{\[}}[[PTRLO:[0-9]+]]:[[PTRHI:[0-9]+]]{{\]}}
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; HSA-DAG: v_mov_b32_e32 v[[VPTRLO:[0-9]+]], s[[PTRLO]]
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; HSA-DAG: v_mov_b32_e32 v[[VPTRHI:[0-9]+]], s[[PTRHI]]
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; HSA: {{flat|global}}_load_dword v{{[0-9]+}}, v{{\[}}[[VPTRLO]]:[[VPTRHI]]{{\]}}
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define amdgpu_kernel void @use_constant_to_global_addrspacecast(i32 addrspace(4)* %ptr) #0 {
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%stof = addrspacecast i32 addrspace(4)* %ptr to i32 addrspace(1)*
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%ld = load volatile i32, i32 addrspace(1)* %stof
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ret void
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}
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; HSA-LABEL: {{^}}use_flat_to_group_addrspacecast:
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; HSA: enable_sgpr_private_segment_buffer = 1
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; HSA: enable_sgpr_dispatch_ptr = 0
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@ -290,6 +301,38 @@ define amdgpu_kernel void @store_flat_scratch(i32 addrspace(1)* noalias %out, i3
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ret void
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}
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; HSA-LABEL: {{^}}use_constant_to_constant32_addrspacecast
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; GFX9: s_load_dwordx2 [[PTRPTR:s\[[0-9]+:[0-9]+\]]], s[4:5], 0x0{{$}}
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; GFX9: s_load_dword [[OFFSET:s[0-9]+]], s[4:5], 0x8{{$}}
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; GFX9: s_load_dwordx2 s{{\[}}[[PTR_LO:[0-9]+]]:[[PTR_HI:[0-9]+]]{{\]}}, [[PTRPTR]], 0x0{{$}}
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; GFX9: s_mov_b32 s[[PTR_HI]], 0{{$}}
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; GFX9: s_add_i32 s[[PTR_LO]], s[[PTR_LO]], [[OFFSET]]
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; GFX9: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0x0{{$}}
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define amdgpu_kernel void @use_constant_to_constant32_addrspacecast(i8 addrspace(4)* addrspace(4)* %ptr.ptr, i32 %offset) #0 {
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%ptr = load volatile i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %ptr.ptr
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%addrspacecast = addrspacecast i8 addrspace(4)* %ptr to i8 addrspace(6)*
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%gep = getelementptr i8, i8 addrspace(6)* %addrspacecast, i32 %offset
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%ptr.cast = bitcast i8 addrspace(6)* %gep to i32 addrspace(6)*
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%load = load volatile i32, i32 addrspace(6)* %ptr.cast, align 4
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ret void
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}
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; HSA-LABEL: {{^}}use_global_to_constant32_addrspacecast
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; GFX9: s_load_dwordx2 [[PTRPTR:s\[[0-9]+:[0-9]+\]]], s[4:5], 0x0{{$}}
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; GFX9: s_load_dword [[OFFSET:s[0-9]+]], s[4:5], 0x8{{$}}
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; GFX9: s_load_dwordx2 s{{\[}}[[PTR_LO:[0-9]+]]:[[PTR_HI:[0-9]+]]{{\]}}, [[PTRPTR]], 0x0{{$}}
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; GFX9: s_mov_b32 s[[PTR_HI]], 0{{$}}
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; GFX9: s_add_i32 s[[PTR_LO]], s[[PTR_LO]], [[OFFSET]]
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; GFX9: s_load_dword s{{[0-9]+}}, s{{\[}}[[PTR_LO]]:[[PTR_HI]]{{\]}}, 0x0{{$}}
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define amdgpu_kernel void @use_global_to_constant32_addrspacecast(i8 addrspace(1)* addrspace(4)* %ptr.ptr, i32 %offset) #0 {
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%ptr = load volatile i8 addrspace(1)*, i8 addrspace(1)* addrspace(4)* %ptr.ptr
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%addrspacecast = addrspacecast i8 addrspace(1)* %ptr to i8 addrspace(6)*
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%gep = getelementptr i8, i8 addrspace(6)* %addrspacecast, i32 %offset
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%ptr.cast = bitcast i8 addrspace(6)* %gep to i32 addrspace(6)*
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%load = load volatile i32, i32 addrspace(6)* %ptr.cast, align 4
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ret void
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}
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declare void @llvm.amdgcn.s.barrier() #1
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declare i32 @llvm.amdgcn.workitem.id.x() #2
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@ -13,3 +13,10 @@ define amdgpu_kernel void @use_constant32bit_to_flat_addrspacecast(i32 addrspace
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store volatile i32 7, i32* %stof
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ret void
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}
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; ERROR: error: <unknown>:0:0: in function use_local_to_constant32bit_addrspacecast void (i32 addrspace(3)*): invalid addrspacecast
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define amdgpu_kernel void @use_local_to_constant32bit_addrspacecast(i32 addrspace(3)* %ptr) #0 {
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%stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(6)*
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%load = load volatile i32, i32 addrspace(6)* %stof
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ret void
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}
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