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Fix some liveout handling related to tail calls, see comments.
I don't think this ever resulted in problems on x86, but it would on ARM. llvm-svn: 105509
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@ -609,7 +609,12 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
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// Finally, if the last instruction in the block is a return, make sure to
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// mark it as using all of the live-out values in the function.
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if (!MBB->empty() && MBB->back().getDesc().isReturn()) {
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// Things marked both call and return are tail calls; do not do this for
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// them. The tail callee need not take the same registers as input
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// that it produces as output, and there are dependencies for its input
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// registers elsewhere.
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if (!MBB->empty() && MBB->back().getDesc().isReturn()
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&& !MBB->back().getDesc().isCall()) {
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MachineInstr *Ret = &MBB->back();
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for (MachineRegisterInfo::liveout_iterator
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@ -2150,17 +2150,12 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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Ops.push_back(InFlag);
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if (isTailCall) {
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// If this is the first return lowered for this function, add the regs
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// to the liveout set for the function.
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if (MF.getRegInfo().liveout_empty()) {
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SmallVector<CCValAssign, 16> RVLocs;
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CCState CCInfo(CallConv, isVarArg, getTargetMachine(), RVLocs,
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*DAG.getContext());
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CCInfo.AnalyzeCallResult(Ins, RetCC_X86);
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for (unsigned i = 0; i != RVLocs.size(); ++i)
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if (RVLocs[i].isRegLoc())
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MF.getRegInfo().addLiveOut(RVLocs[i].getLocReg());
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}
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// We used to do:
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//// If this is the first return lowered for this function, add the regs
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//// to the liveout set for the function.
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// This isn't right, although it's probably harmless on x86; liveouts
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// should be computed from returns not tail calls. Consider a void
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// function making a tail call to a function returning int.
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return DAG.getNode(X86ISD::TC_RETURN, dl,
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NodeTys, &Ops[0], Ops.size());
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}
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