From ae16160dfe6b29f2dd1c69794a2ba03b3858e6f8 Mon Sep 17 00:00:00 2001 From: David Majnemer Date: Fri, 12 Aug 2016 00:18:03 +0000 Subject: [PATCH] Use the range variant of find_if instead of unpacking begin/end No functionality change is intended. llvm-svn: 278443 --- include/llvm/Target/CostTable.h | 14 ++++---- lib/CodeGen/RegisterPressure.cpp | 35 ++++++++----------- lib/Support/SourceMgr.cpp | 4 +-- lib/Support/TargetRegistry.cpp | 5 ++- lib/Target/AArch64/AArch64ISelLowering.cpp | 3 +- .../AMDGPU/R600ControlFlowFinalizer.cpp | 8 ++--- lib/Target/ARM/ARMConstantIslandPass.cpp | 5 ++- lib/Target/ARM/ARMFrameLowering.cpp | 3 +- lib/Target/Hexagon/HexagonBitSimplify.cpp | 4 +-- lib/Target/Hexagon/HexagonFrameLowering.cpp | 2 +- lib/Target/X86/X86ISelLowering.cpp | 10 +++--- tools/llvm-ar/llvm-ar.cpp | 7 ++-- tools/llvm-objdump/MachODump.cpp | 26 ++++++-------- unittests/ProfileData/InstrProfTest.cpp | 10 +++--- unittests/ProfileData/SampleProfTest.cpp | 10 +++--- utils/TableGen/AsmMatcherEmitter.cpp | 19 +++++----- utils/TableGen/CodeGenSchedule.cpp | 8 ++--- 17 files changed, 73 insertions(+), 100 deletions(-) diff --git a/include/llvm/Target/CostTable.h b/include/llvm/Target/CostTable.h index 2499f5c3189..603820af230 100644 --- a/include/llvm/Target/CostTable.h +++ b/include/llvm/Target/CostTable.h @@ -30,9 +30,9 @@ struct CostTblEntry { /// Find in cost table, TypeTy must be comparable to CompareTy by == inline const CostTblEntry *CostTableLookup(ArrayRef Tbl, int ISD, MVT Ty) { - auto I = std::find_if(Tbl.begin(), Tbl.end(), - [=](const CostTblEntry &Entry) { - return ISD == Entry.ISD && Ty == Entry.Type; }); + auto I = find_if(Tbl, [=](const CostTblEntry &Entry) { + return ISD == Entry.ISD && Ty == Entry.Type; + }); if (I != Tbl.end()) return I; @@ -53,11 +53,9 @@ struct TypeConversionCostTblEntry { inline const TypeConversionCostTblEntry * ConvertCostTableLookup(ArrayRef Tbl, int ISD, MVT Dst, MVT Src) { - auto I = std::find_if(Tbl.begin(), Tbl.end(), - [=](const TypeConversionCostTblEntry &Entry) { - return ISD == Entry.ISD && Src == Entry.Src && - Dst == Entry.Dst; - }); + auto I = find_if(Tbl, [=](const TypeConversionCostTblEntry &Entry) { + return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst; + }); if (I != Tbl.end()) return I; diff --git a/lib/CodeGen/RegisterPressure.cpp b/lib/CodeGen/RegisterPressure.cpp index a21d6c1d4d6..dba8929ef05 100644 --- a/lib/CodeGen/RegisterPressure.cpp +++ b/lib/CodeGen/RegisterPressure.cpp @@ -328,10 +328,9 @@ void RegPressureTracker::initLiveThru(const RegPressureTracker &RPTracker) { static LaneBitmask getRegLanes(ArrayRef RegUnits, unsigned RegUnit) { - auto I = std::find_if(RegUnits.begin(), RegUnits.end(), - [RegUnit](const RegisterMaskPair Other) { - return Other.RegUnit == RegUnit; - }); + auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) { + return Other.RegUnit == RegUnit; + }); if (I == RegUnits.end()) return 0; return I->LaneMask; @@ -341,10 +340,9 @@ static void addRegLanes(SmallVectorImpl &RegUnits, RegisterMaskPair Pair) { unsigned RegUnit = Pair.RegUnit; assert(Pair.LaneMask != 0); - auto I = std::find_if(RegUnits.begin(), RegUnits.end(), - [RegUnit](const RegisterMaskPair Other) { - return Other.RegUnit == RegUnit; - }); + auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) { + return Other.RegUnit == RegUnit; + }); if (I == RegUnits.end()) { RegUnits.push_back(Pair); } else { @@ -354,10 +352,9 @@ static void addRegLanes(SmallVectorImpl &RegUnits, static void setRegZero(SmallVectorImpl &RegUnits, unsigned RegUnit) { - auto I = std::find_if(RegUnits.begin(), RegUnits.end(), - [RegUnit](const RegisterMaskPair Other) { - return Other.RegUnit == RegUnit; - }); + auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) { + return Other.RegUnit == RegUnit; + }); if (I == RegUnits.end()) { RegUnits.push_back(RegisterMaskPair(RegUnit, 0)); } else { @@ -369,10 +366,9 @@ static void removeRegLanes(SmallVectorImpl &RegUnits, RegisterMaskPair Pair) { unsigned RegUnit = Pair.RegUnit; assert(Pair.LaneMask != 0); - auto I = std::find_if(RegUnits.begin(), RegUnits.end(), - [RegUnit](const RegisterMaskPair Other) { - return Other.RegUnit == RegUnit; - }); + auto I = find_if(RegUnits, [RegUnit](const RegisterMaskPair Other) { + return Other.RegUnit == RegUnit; + }); if (I != RegUnits.end()) { I->LaneMask &= ~Pair.LaneMask; if (I->LaneMask == 0) @@ -676,10 +672,9 @@ void RegPressureTracker::discoverLiveInOrOut(RegisterMaskPair Pair, assert(Pair.LaneMask != 0); unsigned RegUnit = Pair.RegUnit; - auto I = std::find_if(LiveInOrOut.begin(), LiveInOrOut.end(), - [RegUnit](const RegisterMaskPair &Other) { - return Other.RegUnit == RegUnit; - }); + auto I = find_if(LiveInOrOut, [RegUnit](const RegisterMaskPair &Other) { + return Other.RegUnit == RegUnit; + }); LaneBitmask PrevMask; LaneBitmask NewMask; if (I == LiveInOrOut.end()) { diff --git a/lib/Support/SourceMgr.cpp b/lib/Support/SourceMgr.cpp index 6d44a4d51f6..395c29b4279 100644 --- a/lib/Support/SourceMgr.cpp +++ b/lib/Support/SourceMgr.cpp @@ -14,6 +14,7 @@ //===----------------------------------------------------------------------===// #include "llvm/Support/SourceMgr.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/Twine.h" #include "llvm/Support/Locale.h" #include "llvm/Support/MemoryBuffer.h" @@ -395,8 +396,7 @@ void SMDiagnostic::print(const char *ProgName, raw_ostream &S, bool ShowColors, // map like Clang's TextDiagnostic. For now, we'll just handle tabs by // expanding them later, and bail out rather than show incorrect ranges and // misaligned fixits for any other odd characters. - if (std::find_if(LineContents.begin(), LineContents.end(), isNonASCII) != - LineContents.end()) { + if (find_if(LineContents, isNonASCII) != LineContents.end()) { printSourceLine(S, LineContents); return; } diff --git a/lib/Support/TargetRegistry.cpp b/lib/Support/TargetRegistry.cpp index 02a6d334b91..bed9ed64f80 100644 --- a/lib/Support/TargetRegistry.cpp +++ b/lib/Support/TargetRegistry.cpp @@ -30,8 +30,7 @@ const Target *TargetRegistry::lookupTarget(const std::string &ArchName, // name, because it might be a backend that has no mapping to a target triple. const Target *TheTarget = nullptr; if (!ArchName.empty()) { - auto I = - std::find_if(targets().begin(), targets().end(), + auto I = find_if(targets(), [&](const Target &T) { return ArchName == T.getName(); }); if (I == targets().end()) { @@ -70,7 +69,7 @@ const Target *TargetRegistry::lookupTarget(const std::string &TT, } Triple::ArchType Arch = Triple(TT).getArch(); auto ArchMatch = [&](const Target &T) { return T.ArchMatchFn(Arch); }; - auto I = std::find_if(targets().begin(), targets().end(), ArchMatch); + auto I = find_if(targets(), ArchMatch); if (I == targets().end()) { Error = "No available targets are compatible with this triple."; diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index a11b032e3f8..66f37c88ae5 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -5162,8 +5162,7 @@ static bool isSingletonEXTMask(ArrayRef M, EVT VT, unsigned &Imm) { static bool isEXTMask(ArrayRef M, EVT VT, bool &ReverseEXT, unsigned &Imm) { // Look for the first non-undef element. - const int *FirstRealElt = std::find_if(M.begin(), M.end(), - [](int Elt) {return Elt >= 0;}); + const int *FirstRealElt = find_if(M, [](int Elt) { return Elt >= 0; }); // Benefit form APInt to handle overflow when calculating expected element. unsigned NumElts = VT.getVectorNumElements(); diff --git a/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp b/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp index 4e106bd732c..53f30f88d10 100644 --- a/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp +++ b/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp @@ -354,10 +354,10 @@ private: if (Src.first->getReg() != AMDGPU::ALU_LITERAL_X) continue; int64_t Imm = Src.second; - std::vector::iterator It = - std::find_if(Lits.begin(), Lits.end(), - [&](MachineOperand* val) - { return val->isImm() && (val->getImm() == Imm);}); + std::vector::iterator It = + find_if(Lits, [&](MachineOperand *val) { + return val->isImm() && (val->getImm() == Imm); + }); // Get corresponding Operand MachineOperand &Operand = MI.getOperand( diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index e4fefef2683..aac6c5bcf5d 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -2056,9 +2056,8 @@ bool ARMConstantIslands::optimizeThumb2JumpTables() { // record the TBB or TBH use. int CPEntryIdx = JumpTableEntryIndices[JTI]; auto &CPEs = CPEntries[CPEntryIdx]; - auto Entry = std::find_if(CPEs.begin(), CPEs.end(), [&](CPEntry &E) { - return E.CPEMI == User.CPEMI; - }); + auto Entry = + find_if(CPEs, [&](CPEntry &E) { return E.CPEMI == User.CPEMI; }); ++Entry->RefCount; CPUsers.emplace_back(CPUser(NewJTMI, User.CPEMI, 4, false, false)); } diff --git a/lib/Target/ARM/ARMFrameLowering.cpp b/lib/Target/ARM/ARMFrameLowering.cpp index 9e79faa3abf..853507527e0 100644 --- a/lib/Target/ARM/ARMFrameLowering.cpp +++ b/lib/Target/ARM/ARMFrameLowering.cpp @@ -196,8 +196,7 @@ struct StackAdjustingInsts { } void addExtraBytes(const MachineBasicBlock::iterator I, unsigned ExtraBytes) { - auto Info = std::find_if(Insts.begin(), Insts.end(), - [&](InstInfo &Info) { return Info.I == I; }); + auto Info = find_if(Insts, [&](InstInfo &Info) { return Info.I == I; }); assert(Info != Insts.end() && "invalid sp adjusting instruction"); Info->SPAdjust += ExtraBytes; } diff --git a/lib/Target/Hexagon/HexagonBitSimplify.cpp b/lib/Target/Hexagon/HexagonBitSimplify.cpp index d4b54e3ddd0..76dcc617697 100644 --- a/lib/Target/Hexagon/HexagonBitSimplify.cpp +++ b/lib/Target/Hexagon/HexagonBitSimplify.cpp @@ -2731,7 +2731,7 @@ bool HexagonLoopRescheduling::processLoop(LoopCand &C) { auto LoopInpEq = [G] (const PhiInfo &P) -> bool { return G.Out.Reg == P.LR.Reg; }; - if (std::find_if(Phis.begin(), Phis.end(), LoopInpEq) == Phis.end()) + if (find_if(Phis, LoopInpEq) == Phis.end()) continue; G.Inp.Reg = Inputs.find_first(); @@ -2756,7 +2756,7 @@ bool HexagonLoopRescheduling::processLoop(LoopCand &C) { auto LoopInpEq = [G] (const PhiInfo &P) -> bool { return G.Out.Reg == P.LR.Reg; }; - auto F = std::find_if(Phis.begin(), Phis.end(), LoopInpEq); + auto F = find_if(Phis, LoopInpEq); if (F == Phis.end()) continue; unsigned PrehR = 0; diff --git a/lib/Target/Hexagon/HexagonFrameLowering.cpp b/lib/Target/Hexagon/HexagonFrameLowering.cpp index 2530b5f158e..17f227adda8 100644 --- a/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -838,7 +838,7 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB, auto IfR = [Reg] (const CalleeSavedInfo &C) -> bool { return C.getReg() == Reg; }; - auto F = std::find_if(CSI.begin(), CSI.end(), IfR); + auto F = find_if(CSI, IfR); if (F == CSI.end()) continue; diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 8903c861276..af97864043a 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -8406,9 +8406,9 @@ static SDValue lowerVectorShuffleAsElementInsertion( MVT ExtVT = VT; MVT EltVT = VT.getVectorElementType(); - int V2Index = std::find_if(Mask.begin(), Mask.end(), - [&Mask](int M) { return M >= (int)Mask.size(); }) - - Mask.begin(); + int V2Index = + find_if(Mask, [&Mask](int M) { return M >= (int)Mask.size(); }) - + Mask.begin(); bool IsV1Zeroable = true; for (int i = 0, Size = Mask.size(); i < Size; ++i) if (i != V2Index && !Zeroable[i]) { @@ -9141,9 +9141,7 @@ static SDValue lowerVectorShuffleWithSHUFPS(const SDLoc &DL, MVT VT, int NumV2Elements = count_if(Mask, [](int M) { return M >= 4; }); if (NumV2Elements == 1) { - int V2Index = - std::find_if(Mask.begin(), Mask.end(), [](int M) { return M >= 4; }) - - Mask.begin(); + int V2Index = find_if(Mask, [](int M) { return M >= 4; }) - Mask.begin(); // Compute the index adjacent to V2Index and in the same half by toggling // the low bit. diff --git a/tools/llvm-ar/llvm-ar.cpp b/tools/llvm-ar/llvm-ar.cpp index 7ecd3db7592..40e4a3a493c 100644 --- a/tools/llvm-ar/llvm-ar.cpp +++ b/tools/llvm-ar/llvm-ar.cpp @@ -498,10 +498,9 @@ static InsertAction computeInsertAction(ArchiveOperation Operation, if (Operation == QuickAppend || Members.empty()) return IA_AddOldMember; - auto MI = - std::find_if(Members.begin(), Members.end(), [Name](StringRef Path) { - return Name == sys::path::filename(Path); - }); + auto MI = find_if(Members, [Name](StringRef Path) { + return Name == sys::path::filename(Path); + }); if (MI == Members.end()) return IA_AddOldMember; diff --git a/tools/llvm-objdump/MachODump.cpp b/tools/llvm-objdump/MachODump.cpp index b5e7a067b7c..d0ac915e90a 100644 --- a/tools/llvm-objdump/MachODump.cpp +++ b/tools/llvm-objdump/MachODump.cpp @@ -880,11 +880,9 @@ static void DumpLiteralPointerSection(MachOObjectFile *O, } // For local references see what the section the literal pointer points to. - auto Sect = std::find_if(LiteralSections.begin(), LiteralSections.end(), - [&](const SectionRef &R) { - return lp >= R.getAddress() && - lp < R.getAddress() + R.getSize(); - }); + auto Sect = find_if(LiteralSections, [&](const SectionRef &R) { + return lp >= R.getAddress() && lp < R.getAddress() + R.getSize(); + }); if (Sect == LiteralSections.end()) { outs() << format("0x%" PRIx64, lp) << " (not in a literal section)\n"; continue; @@ -2040,11 +2038,10 @@ static int SymbolizerGetOpInfo(void *DisInfo, uint64_t Pc, uint64_t Offset, bool r_scattered = false; uint32_t r_value, pair_r_value, r_type, r_length, other_half; auto Reloc = - std::find_if(info->S.relocations().begin(), info->S.relocations().end(), - [&](const RelocationRef &Reloc) { - uint64_t RelocOffset = Reloc.getOffset(); - return RelocOffset == sect_offset; - }); + find_if(info->S.relocations(), [&](const RelocationRef &Reloc) { + uint64_t RelocOffset = Reloc.getOffset(); + return RelocOffset == sect_offset; + }); if (Reloc == info->S.relocations().end()) return 0; @@ -2179,11 +2176,10 @@ static int SymbolizerGetOpInfo(void *DisInfo, uint64_t Pc, uint64_t Offset, uint64_t sect_addr = info->S.getAddress(); uint64_t sect_offset = (Pc + Offset) - sect_addr; auto Reloc = - std::find_if(info->S.relocations().begin(), info->S.relocations().end(), - [&](const RelocationRef &Reloc) { - uint64_t RelocOffset = Reloc.getOffset(); - return RelocOffset == sect_offset; - }); + find_if(info->S.relocations(), [&](const RelocationRef &Reloc) { + uint64_t RelocOffset = Reloc.getOffset(); + return RelocOffset == sect_offset; + }); if (Reloc == info->S.relocations().end()) return 0; diff --git a/unittests/ProfileData/InstrProfTest.cpp b/unittests/ProfileData/InstrProfTest.cpp index 4efb17ecc26..1b44463cd65 100644 --- a/unittests/ProfileData/InstrProfTest.cpp +++ b/unittests/ProfileData/InstrProfTest.cpp @@ -167,15 +167,13 @@ TEST_F(InstrProfTest, get_profile_summary) { auto Predicate = [&Cutoff](const ProfileSummaryEntry &PE) { return PE.Cutoff == Cutoff; }; - auto EightyPerc = std::find_if(Details.begin(), Details.end(), Predicate); + auto EightyPerc = find_if(Details, Predicate); Cutoff = 900000; - auto NinetyPerc = std::find_if(Details.begin(), Details.end(), Predicate); + auto NinetyPerc = find_if(Details, Predicate); Cutoff = 950000; - auto NinetyFivePerc = - std::find_if(Details.begin(), Details.end(), Predicate); + auto NinetyFivePerc = find_if(Details, Predicate); Cutoff = 990000; - auto NinetyNinePerc = - std::find_if(Details.begin(), Details.end(), Predicate); + auto NinetyNinePerc = find_if(Details, Predicate); ASSERT_EQ(576460752303423488U, EightyPerc->MinCount); ASSERT_EQ(288230376151711744U, NinetyPerc->MinCount); ASSERT_EQ(288230376151711744U, NinetyFivePerc->MinCount); diff --git a/unittests/ProfileData/SampleProfTest.cpp b/unittests/ProfileData/SampleProfTest.cpp index 175852b93fb..96b2a01c7bd 100644 --- a/unittests/ProfileData/SampleProfTest.cpp +++ b/unittests/ProfileData/SampleProfTest.cpp @@ -124,15 +124,13 @@ struct SampleProfTest : ::testing::Test { return PE.Cutoff == Cutoff; }; std::vector &Details = Summary.getDetailedSummary(); - auto EightyPerc = std::find_if(Details.begin(), Details.end(), Predicate); + auto EightyPerc = find_if(Details, Predicate); Cutoff = 900000; - auto NinetyPerc = std::find_if(Details.begin(), Details.end(), Predicate); + auto NinetyPerc = find_if(Details, Predicate); Cutoff = 950000; - auto NinetyFivePerc = - std::find_if(Details.begin(), Details.end(), Predicate); + auto NinetyFivePerc = find_if(Details, Predicate); Cutoff = 990000; - auto NinetyNinePerc = - std::find_if(Details.begin(), Details.end(), Predicate); + auto NinetyNinePerc = find_if(Details, Predicate); ASSERT_EQ(60000u, EightyPerc->MinCount); ASSERT_EQ(60000u, NinetyPerc->MinCount); ASSERT_EQ(60000u, NinetyFivePerc->MinCount); diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 663d7d8ab42..6f7fd2bca85 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -556,20 +556,17 @@ struct MatchableInfo { /// findAsmOperand - Find the AsmOperand with the specified name and /// suboperand index. int findAsmOperand(StringRef N, int SubOpIdx) const { - auto I = std::find_if(AsmOperands.begin(), AsmOperands.end(), - [&](const AsmOperand &Op) { - return Op.SrcOpName == N && Op.SubOpIdx == SubOpIdx; - }); + auto I = find_if(AsmOperands, [&](const AsmOperand &Op) { + return Op.SrcOpName == N && Op.SubOpIdx == SubOpIdx; + }); return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1; } /// findAsmOperandNamed - Find the first AsmOperand with the specified name. /// This does not check the suboperand index. int findAsmOperandNamed(StringRef N) const { - auto I = std::find_if(AsmOperands.begin(), AsmOperands.end(), - [&](const AsmOperand &Op) { - return Op.SrcOpName == N; - }); + auto I = find_if(AsmOperands, + [&](const AsmOperand &Op) { return Op.SrcOpName == N; }); return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1; } @@ -774,9 +771,9 @@ public: } bool hasOptionalOperands() const { - return std::find_if(Classes.begin(), Classes.end(), - [](const ClassInfo& Class){ return Class.IsOptional; }) - != Classes.end(); + return find_if(Classes, [](const ClassInfo &Class) { + return Class.IsOptional; + }) != Classes.end(); } }; diff --git a/utils/TableGen/CodeGenSchedule.cpp b/utils/TableGen/CodeGenSchedule.cpp index d2d7bd83831..d6b5e0a90eb 100644 --- a/utils/TableGen/CodeGenSchedule.cpp +++ b/utils/TableGen/CodeGenSchedule.cpp @@ -1570,11 +1570,9 @@ void CodeGenSchedModels::checkCompleteness() { continue; const RecVec &InstRWs = SC.InstRWs; - auto I = std::find_if(InstRWs.begin(), InstRWs.end(), - [&ProcModel] (const Record *R) { - return R->getValueAsDef("SchedModel") == - ProcModel.ModelDef; - }); + auto I = find_if(InstRWs, [&ProcModel](const Record *R) { + return R->getValueAsDef("SchedModel") == ProcModel.ModelDef; + }); if (I == InstRWs.end()) { PrintError("'" + ProcModel.ModelName + "' lacks information for '" + Inst->TheDef->getName() + "'");