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[PowerPC] Use mtvsrdd to put callee-saved GPR into VSR
This patch exploits mtvsrdd instruction (available in ISA3.0+) to save two callee-saved GPR registers into a single VSR, making it more efficient. Reviewed By: jsji, nemanjai Differential Revision: https://reviews.llvm.org/D62565
This commit is contained in:
Qiu Chaofan
parent
12a1ce706d
commit
ae1dd01644
@ -2248,30 +2248,39 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots(
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BVCalleeSaved.set(CSRegs[i]);
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for (unsigned Reg : BVAllocatable.set_bits()) {
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// Set to 0 if the register is not a volatile VF/F8 register, or if it is
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// Set to 0 if the register is not a volatile VSX register, or if it is
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// used in the function.
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if (BVCalleeSaved[Reg] ||
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(!PPC::F8RCRegClass.contains(Reg) &&
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!PPC::VFRCRegClass.contains(Reg)) ||
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(MF.getRegInfo().isPhysRegUsed(Reg)))
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if (BVCalleeSaved[Reg] || !PPC::VSRCRegClass.contains(Reg) ||
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MF.getRegInfo().isPhysRegUsed(Reg))
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BVAllocatable.reset(Reg);
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}
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bool AllSpilledToReg = true;
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unsigned LastVSRUsedForSpill = 0;
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for (auto &CS : CSI) {
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if (BVAllocatable.none())
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return false;
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unsigned Reg = CS.getReg();
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if (!PPC::G8RCRegClass.contains(Reg) && !PPC::GPRCRegClass.contains(Reg)) {
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if (!PPC::G8RCRegClass.contains(Reg)) {
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AllSpilledToReg = false;
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continue;
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}
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// For P9, we can reuse LastVSRUsedForSpill to spill two GPRs
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// into one VSR using the mtvsrdd instruction.
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if (LastVSRUsedForSpill != 0) {
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CS.setDstReg(LastVSRUsedForSpill);
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BVAllocatable.reset(LastVSRUsedForSpill);
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LastVSRUsedForSpill = 0;
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continue;
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}
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unsigned VolatileVFReg = BVAllocatable.find_first();
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if (VolatileVFReg < BVAllocatable.size()) {
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CS.setDstReg(VolatileVFReg);
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BVAllocatable.reset(VolatileVFReg);
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LastVSRUsedForSpill = VolatileVFReg;
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} else {
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AllSpilledToReg = false;
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}
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@ -2290,6 +2299,24 @@ bool PPCFrameLowering::spillCalleeSavedRegisters(
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DebugLoc DL;
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bool CRSpilled = false;
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MachineInstrBuilder CRMIB;
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BitVector Spilled(TRI->getNumRegs());
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VSRContainingGPRs.clear();
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// Map each VSR to GPRs to be spilled with into it. Single VSR can contain one
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// or two GPRs, so we need table to record information for later save/restore.
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llvm::for_each(CSI, [&](const CalleeSavedInfo &Info) {
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if (Info.isSpilledToReg()) {
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auto &SpilledVSR =
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VSRContainingGPRs.FindAndConstruct(Info.getDstReg()).second;
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assert(SpilledVSR.second == 0 &&
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"Can't spill more than two GPRs into VSR!");
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if (SpilledVSR.first == 0)
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SpilledVSR.first = Info.getReg();
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else
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SpilledVSR.second = Info.getReg();
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}
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});
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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unsigned Reg = CSI[i].getReg();
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@ -2339,9 +2366,31 @@ bool PPCFrameLowering::spillCalleeSavedRegisters(
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}
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} else {
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if (CSI[i].isSpilledToReg()) {
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NumPESpillVSR++;
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BuildMI(MBB, MI, DL, TII.get(PPC::MTVSRD), CSI[i].getDstReg())
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.addReg(Reg, getKillRegState(true));
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unsigned Dst = CSI[i].getDstReg();
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if (Spilled[Dst])
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continue;
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if (VSRContainingGPRs[Dst].second != 0) {
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assert(Subtarget.hasP9Vector() &&
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"mtvsrdd is unavailable on pre-P9 targets.");
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NumPESpillVSR += 2;
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BuildMI(MBB, MI, DL, TII.get(PPC::MTVSRDD), Dst)
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.addReg(VSRContainingGPRs[Dst].first, getKillRegState(true))
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.addReg(VSRContainingGPRs[Dst].second, getKillRegState(true));
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} else if (VSRContainingGPRs[Dst].second == 0) {
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assert(Subtarget.hasP8Vector() &&
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"Can't move GPR to VSR on pre-P8 targets.");
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++NumPESpillVSR;
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BuildMI(MBB, MI, DL, TII.get(PPC::MTVSRD),
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TRI->getSubReg(Dst, PPC::sub_64))
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.addReg(VSRContainingGPRs[Dst].first, getKillRegState(true));
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} else {
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llvm_unreachable("More than two GPRs spilled to a VSR!");
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}
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Spilled.set(Dst);
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} else {
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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// Use !IsLiveIn for the kill flag.
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@ -2445,6 +2494,7 @@ bool PPCFrameLowering::restoreCalleeSavedRegisters(
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bool CR3Spilled = false;
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bool CR4Spilled = false;
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unsigned CSIIndex = 0;
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BitVector Restored(TRI->getNumRegs());
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// Initialize insertion-point logic; we will be restoring in reverse
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// order of spill.
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@ -2489,9 +2539,32 @@ bool PPCFrameLowering::restoreCalleeSavedRegisters(
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if (CSI[i].isSpilledToReg()) {
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DebugLoc DL;
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NumPEReloadVSR++;
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BuildMI(MBB, I, DL, TII.get(PPC::MFVSRD), Reg)
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.addReg(CSI[i].getDstReg(), getKillRegState(true));
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unsigned Dst = CSI[i].getDstReg();
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if (Restored[Dst])
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continue;
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if (VSRContainingGPRs[Dst].second != 0) {
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assert(Subtarget.hasP9Vector());
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NumPEReloadVSR += 2;
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BuildMI(MBB, I, DL, TII.get(PPC::MFVSRLD),
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VSRContainingGPRs[Dst].second)
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.addReg(Dst);
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BuildMI(MBB, I, DL, TII.get(PPC::MFVSRD),
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VSRContainingGPRs[Dst].first)
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.addReg(TRI->getSubReg(Dst, PPC::sub_64), getKillRegState(true));
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} else if (VSRContainingGPRs[Dst].second == 0) {
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assert(Subtarget.hasP8Vector());
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++NumPEReloadVSR;
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BuildMI(MBB, I, DL, TII.get(PPC::MFVSRD),
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VSRContainingGPRs[Dst].first)
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.addReg(TRI->getSubReg(Dst, PPC::sub_64), getKillRegState(true));
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} else {
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llvm_unreachable("More than two GPRs spilled to a VSR!");
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}
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Restored.set(Dst);
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} else {
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// Default behavior for non-CR saves.
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const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
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@ -28,6 +28,10 @@ class PPCFrameLowering: public TargetFrameLowering {
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const unsigned BasePointerSaveOffset;
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const unsigned CRSaveOffset;
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// Map each group of one or two GPRs to corresponding VSR for spilling.
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// TODO: Use local table in methods to avoid this mutable member.
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mutable DenseMap<unsigned, std::pair<Register, Register>> VSRContainingGPRs;
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/**
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* Find register[s] that can be used in function prologue and epilogue
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*
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@ -14,15 +14,15 @@ body: |
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$v20 = IMPLICIT_DEF
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BLR8 implicit undef $lr8, implicit undef $rm
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# Use mtvsrdd to save two GPRs in a single instruction
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# CHECK-LABEL: name: test1BB
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# CHECK: body: |
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# CHECK: liveins: $x14, $x15, $x16, $v20
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# CHECK: $f1 = MTVSRD killed $x14
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# CHECK-NEXT: $f2 = MTVSRD killed $x15
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# CHECK-NEXT: $f3 = MTVSRD killed $x16
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# CHECK: $x16 = MFVSRD killed $f3
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# CHECK-NEXT: $x15 = MFVSRD killed $f2
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# CHECK-NEXT: $x14 = MFVSRD killed $f1
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# CHECK: $v0 = MTVSRDD killed $x14, killed $x15
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# CHECK-NEXT: $vf1 = MTVSRD killed $x16
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# CHECK: $x16 = MFVSRD killed $vf1
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# CHECK-NEXT: $x15 = MFVSRLD $v0
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# CHECK-NEXT: $x14 = MFVSRD killed $vf0
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...
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---
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@ -55,15 +55,14 @@ body: |
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## clobbered before restored in the epilogue.
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# CHECK-LABEL: name: test2BB
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# CHECK: body: |
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# CHECK: $f0 = MTVSRD killed $x14
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# CHECK-NEXT: $f1 = MTVSRD killed $x15
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# CHECK-NEXT: $f2 = MTVSRD killed $x16
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# CHECK: $v0 = MTVSRDD killed $x14, killed $x15
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# CHECK-NEXT: $vf1 = MTVSRD killed $x16
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# CHECK: bb.2:
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# CHECK-NEXT: successors: %bb.3
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# CHECK-NEXT: liveins: $f0, $f1, $f2
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# CHECK-NEXT: liveins: $v0, $v1
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# CHECK: bb.3:
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# CHECK-NEXT: liveins: $f0, $f1, $f2
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# CHECK: $x16 = MFVSRD killed $f2
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# CHECK-NEXT: $x15 = MFVSRD killed $f1
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# CHECK-NEXT: $x14 = MFVSRD killed $f0
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# CHECK-NEXT: liveins: $v0, $v1
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# CHECK: $x16 = MFVSRD killed $vf1
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# CHECK-NEXT: $x15 = MFVSRLD $v0
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# CHECK-NEXT: $x14 = MFVSRD killed $vf0
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...
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