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[X86] Add tests showing failure to fold mul(abs(x),abs(x)) -> mul(x,x) (PR39476)

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Simon Pilgrim 2020-05-03 17:38:57 +01:00
parent f23aa88e6e
commit ae9a92468e
1 changed files with 71 additions and 0 deletions
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71
test/CodeGen/X86/combine-mul.ll
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@ -283,6 +283,77 @@ define <4 x i32> @combine_vec_mul_add(<4 x i32> %x) {
ret <4 x i32> %2
}
; TODO fold mul(abs(x),abs(x)) -> mul(x,x)
define i31 @combine_mul_abs_i31(i31 %0) {
; SSE-LABEL: combine_mul_abs_i31:
; SSE: # %bb.0:
; SSE-NEXT: addl %edi, %edi
; SSE-NEXT: sarl %edi
; SSE-NEXT: movl %edi, %eax
; SSE-NEXT: negl %eax
; SSE-NEXT: cmovll %edi, %eax
; SSE-NEXT: imull %eax, %eax
; SSE-NEXT: retq
;
; AVX-LABEL: combine_mul_abs_i31:
; AVX: # %bb.0:
; AVX-NEXT: addl %edi, %edi
; AVX-NEXT: sarl %edi
; AVX-NEXT: movl %edi, %eax
; AVX-NEXT: negl %eax
; AVX-NEXT: cmovll %edi, %eax
; AVX-NEXT: imull %eax, %eax
; AVX-NEXT: retq
%c = icmp slt i31 %0, 0
%s = sub nsw i31 0, %0
%r = select i1 %c, i31 %s, i31 %0
%m = mul i31 %r, %r
ret i31 %m
}
define i32 @combine_mul_abs_i32(i32 %0) {
; SSE-LABEL: combine_mul_abs_i32:
; SSE: # %bb.0:
; SSE-NEXT: movl %edi, %eax
; SSE-NEXT: negl %eax
; SSE-NEXT: cmovll %edi, %eax
; SSE-NEXT: imull %eax, %eax
; SSE-NEXT: retq
;
; AVX-LABEL: combine_mul_abs_i32:
; AVX: # %bb.0:
; AVX-NEXT: movl %edi, %eax
; AVX-NEXT: negl %eax
; AVX-NEXT: cmovll %edi, %eax
; AVX-NEXT: imull %eax, %eax
; AVX-NEXT: retq
%c = icmp slt i32 %0, 0
%s = sub nsw i32 0, %0
%r = select i1 %c, i32 %s, i32 %0
%m = mul i32 %r, %r
ret i32 %m
}
define <4 x i32> @combine_mul_abs_v4i32(<4 x i32> %0) {
; SSE-LABEL: combine_mul_abs_v4i32:
; SSE: # %bb.0:
; SSE-NEXT: pabsd %xmm0, %xmm0
; SSE-NEXT: pmulld %xmm0, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: combine_mul_abs_v4i32:
; AVX: # %bb.0:
; AVX-NEXT: vpabsd %xmm0, %xmm0
; AVX-NEXT: vpmulld %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%c = icmp slt <4 x i32> %0, zeroinitializer
%s = sub nsw <4 x i32> zeroinitializer, %0
%r = select <4 x i1> %c, <4 x i32> %s, <4 x i32> %0
%m = mul <4 x i32> %r, %r
ret <4 x i32> %m
}
; This would infinite loop because DAGCombiner wants to turn this into a shift,
; but x86 lowering wants to avoid non-uniform vector shift amounts.