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[X86] Remove ProcIntelKNL and replace with a SlowPMADDWD flag to use in the one place it was checked.
llvm-svn: 345286
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3034a9b0af
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@ -98,6 +98,9 @@ def FeatureSlowSHLD : SubtargetFeature<"slow-shld", "IsSHLDSlow", "true",
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"SHLD instruction is slow">;
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def FeatureSlowPMULLD : SubtargetFeature<"slow-pmulld", "IsPMULLDSlow", "true",
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"PMULLD instruction is slow">;
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def FeatureSlowPMADDWD : SubtargetFeature<"slow-pmaddwd", "IsPMADDWDSlow",
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"true",
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"PMADDWD is slower than PMULLD">;
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// FIXME: This should not apply to CPUs that do not have SSE.
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def FeatureSlowUAMem16 : SubtargetFeature<"slow-unaligned-mem-16",
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"IsUAMem16Slow", "true",
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@ -460,8 +463,6 @@ def ProcIntelGLP : SubtargetFeature<"glp", "X86ProcFamily", "IntelGLP",
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"Intel Goldmont Plus processors">;
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def ProcIntelTRM : SubtargetFeature<"tremont", "X86ProcFamily", "IntelTRM",
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"Intel Tremont processors">;
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def ProcIntelKNL : SubtargetFeature<"knl", "X86ProcFamily",
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"IntelKNL", "Intel Knights Landing processors">;
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class Proc<string Name, list<SubtargetFeature> Features>
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: ProcessorModel<Name, GenericModel, Features>;
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@ -845,19 +846,19 @@ def KNLFeatures : ProcessorFeatures<[], [
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// FIXME: define KNL model
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class KnightsLandingProc<string Name> : ProcModel<Name, HaswellModel,
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KNLFeatures.Value, [
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ProcIntelKNL,
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FeatureSlowTwoMemOps,
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FeatureFastPartialYMMorZMMWrite,
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FeatureHasFastGather
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FeatureHasFastGather,
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FeatureSlowPMADDWD
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]>;
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def : KnightsLandingProc<"knl">;
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class KnightsMillProc<string Name> : ProcModel<Name, HaswellModel,
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KNLFeatures.Value, [
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ProcIntelKNL,
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FeatureSlowTwoMemOps,
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FeatureFastPartialYMMorZMMWrite,
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FeatureHasFastGather,
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FeatureSlowPMADDWD,
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FeatureVPOPCNTDQ
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]>;
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def : KnightsMillProc<"knm">; // TODO Add AVX5124FMAPS/AVX5124VNNIW features
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@ -34361,7 +34361,7 @@ static SDValue combineMulToPMADDWD(SDNode *N, SelectionDAG &DAG,
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if (!Subtarget.hasSSE2())
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return SDValue();
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if (Subtarget.getProcFamily() == X86Subtarget::IntelKNL)
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if (Subtarget.isPMADDWDSlow())
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return SDValue();
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EVT VT = N->getValueType(0);
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@ -60,8 +60,7 @@ public:
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IntelSLM,
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IntelGLM,
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IntelGLP,
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IntelTRM,
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IntelKNL,
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IntelTRM
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};
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protected:
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@ -224,6 +223,9 @@ protected:
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// PMULUDQ.
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bool IsPMULLDSlow = false;
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/// True if the PMADDWD instruction is slow compared to PMULLD.
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bool IsPMADDWDSlow = false;
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/// True if unaligned memory accesses of 16-bytes are slow.
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bool IsUAMem16Slow = false;
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@ -613,6 +615,7 @@ public:
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bool hasPTWRITE() const { return HasPTWRITE; }
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bool isSHLDSlow() const { return IsSHLDSlow; }
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bool isPMULLDSlow() const { return IsPMULLDSlow; }
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bool isPMADDWDSlow() const { return IsPMADDWDSlow; }
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bool isUnalignedMem16Slow() const { return IsUAMem16Slow; }
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bool isUnalignedMem32Slow() const { return IsUAMem32Slow; }
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int getGatherOverhead() const { return GatherOverhead; }
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