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Make TargetInstrInfo::isCopyInstr return true for regular COPY-instructions
..Move all target-dependent checks into new isCopyInstrImpl method. This change allows us to treat MoveReg-type instructions and generic COPY instruction in the same way Differential Revision: https://reviews.llvm.org/D49913 llvm-svn: 341072
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@ -846,15 +846,33 @@ public:
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llvm_unreachable("Target didn't implement TargetInstrInfo::copyPhysReg!");
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}
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protected:
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/// Target-dependent implemenation for IsCopyInstr.
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/// If the specific machine instruction is a instruction that moves/copies
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/// value from one register to another register return true along with
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/// @Source machine operand and @Destination machine operand.
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virtual bool isCopyInstr(const MachineInstr &MI,
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const MachineOperand *&SourceOpNum,
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const MachineOperand *&Destination) const {
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virtual bool isCopyInstrImpl(const MachineInstr &MI,
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const MachineOperand *&Source,
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const MachineOperand *&Destination) const {
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return false;
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}
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public:
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/// If the specific machine instruction is a instruction that moves/copies
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/// value from one register to another register return true along with
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/// @Source machine operand and @Destination machine operand.
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/// For COPY-instruction the method naturally returns true, for all other
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/// instructions the method calls target-dependent implementation.
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bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Source,
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const MachineOperand *&Destination) const {
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if (MI.isCopy()) {
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Destination = &MI.getOperand(0);
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Source = &MI.getOperand(1);
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return true;
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}
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return isCopyInstrImpl(MI, Source, Destination);
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}
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/// Store the specified register of the given register class to the specified
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/// stack frame index. The store instruction is to be added to the given
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/// machine basic block before the specified machine instruction. If isKill
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@ -935,9 +935,9 @@ void ARMBaseInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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Mov->addRegisterKilled(SrcReg, TRI);
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}
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bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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bool ARMBaseInstrInfo::isCopyInstrImpl(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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// VMOVRRD is also a copy instruction but it requires
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// special way of handling. It is more complex copy version
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// and since that we are not considering it. For recognition
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@ -101,6 +101,12 @@ protected:
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unsigned OpIdx1,
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unsigned OpIdx2) const override;
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/// If the specific machine instruction is a instruction that moves/copies
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/// value from one register to another register return true along with
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/// @Source machine operand and @Destination machine operand.
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bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
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const MachineOperand *&Destination) const override;
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public:
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// Return whether the target has an explicit NOP encoding.
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bool hasNOP() const;
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@ -201,9 +207,6 @@ public:
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const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const override;
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bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
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const MachineOperand *&Dest) const override;
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, bool isKill, int FrameIndex,
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@ -97,9 +97,9 @@ void Mips16InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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MIB.addReg(SrcReg, getKillRegState(KillSrc));
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}
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bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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bool Mips16InstrInfo::isCopyInstrImpl(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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if (MI.isMoveReg()) {
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Dest = &MI.getOperand(0);
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Src = &MI.getOperand(1);
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@ -53,9 +53,6 @@ public:
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const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const override;
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bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
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const MachineOperand *&Dest) const override;
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void storeRegToStack(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, bool isKill, int FrameIndex,
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@ -105,6 +102,14 @@ public:
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void BuildAddiuSpImm
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(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const;
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protected:
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/// If the specific machine instruction is a instruction that moves/copies
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/// value from one register to another register return true along with
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/// @Source machine operand and @Destination machine operand.
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bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
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const MachineOperand *&Destination) const override;
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private:
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unsigned getAnalyzableBrOpc(unsigned Opc) const override;
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@ -222,9 +222,9 @@ static bool isReadOrWriteToDSPReg(const MachineInstr &MI, bool &isWrite) {
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/// We check for the common case of 'or', as it's MIPS' preferred instruction
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/// for GPRs but we have to check the operands to ensure that is the case.
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/// Other move instructions for MIPS are directly identifiable.
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bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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bool MipsSEInstrInfo::isCopyInstrImpl(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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bool isDSPControlWrite = false;
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// Condition is made to match the creation of WRDSP/RDDSP copy instruction
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// from copyPhysReg function.
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@ -47,9 +47,6 @@ public:
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const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const override;
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bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
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const MachineOperand *&Dest) const override;
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void storeRegToStack(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, bool isKill, int FrameIndex,
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@ -79,6 +76,13 @@ public:
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MachineBasicBlock::iterator II, const DebugLoc &DL,
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unsigned *NewImm) const;
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protected:
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/// If the specific machine instruction is a instruction that moves/copies
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/// value from one register to another register return true along with
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/// @Source machine operand and @Destination machine operand.
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bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
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const MachineOperand *&Destination) const override;
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private:
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unsigned getAnalyzableBrOpc(unsigned Opc) const override;
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@ -3112,9 +3112,9 @@ void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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llvm_unreachable("Cannot emit physreg copy instruction");
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}
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bool X86InstrInfo::isCopyInstr(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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bool X86InstrInfo::isCopyInstrImpl(const MachineInstr &MI,
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const MachineOperand *&Src,
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const MachineOperand *&Dest) const {
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if (MI.isMoveReg()) {
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Dest = &MI.getOperand(0);
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Src = &MI.getOperand(1);
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@ -349,8 +349,6 @@ public:
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void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const override;
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bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
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const MachineOperand *&Dest) const override;
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI, unsigned SrcReg,
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bool isKill, int FrameIndex,
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@ -576,6 +574,12 @@ protected:
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unsigned CommuteOpIdx1,
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unsigned CommuteOpIdx2) const override;
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/// If the specific machine instruction is a instruction that moves/copies
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/// value from one register to another register return true along with
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/// @Source machine operand and @Destination machine operand.
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bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
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const MachineOperand *&Destination) const override;
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private:
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MachineInstr *convertToThreeAddressWithLEA(unsigned MIOpc,
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MachineFunction::iterator &MFI,
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