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Make TargetInstrInfo::isCopyInstr return true for regular COPY-instructions

..Move all target-dependent checks into new isCopyInstrImpl method.

This change allows us to treat MoveReg-type instructions and generic
COPY instruction in the same way

Differential Revision: https://reviews.llvm.org/D49913

llvm-svn: 341072
This commit is contained in:
Alexander Ivchenko 2018-08-30 14:32:47 +00:00
parent 5a64e70379
commit aefb031ab6
9 changed files with 60 additions and 26 deletions

View File

@ -846,15 +846,33 @@ public:
llvm_unreachable("Target didn't implement TargetInstrInfo::copyPhysReg!");
}
protected:
/// Target-dependent implemenation for IsCopyInstr.
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
virtual bool isCopyInstr(const MachineInstr &MI,
const MachineOperand *&SourceOpNum,
const MachineOperand *&Destination) const {
virtual bool isCopyInstrImpl(const MachineInstr &MI,
const MachineOperand *&Source,
const MachineOperand *&Destination) const {
return false;
}
public:
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
/// For COPY-instruction the method naturally returns true, for all other
/// instructions the method calls target-dependent implementation.
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Source,
const MachineOperand *&Destination) const {
if (MI.isCopy()) {
Destination = &MI.getOperand(0);
Source = &MI.getOperand(1);
return true;
}
return isCopyInstrImpl(MI, Source, Destination);
}
/// Store the specified register of the given register class to the specified
/// stack frame index. The store instruction is to be added to the given
/// machine basic block before the specified machine instruction. If isKill

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@ -935,9 +935,9 @@ void ARMBaseInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
Mov->addRegisterKilled(SrcReg, TRI);
}
bool ARMBaseInstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
bool ARMBaseInstrInfo::isCopyInstrImpl(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
// VMOVRRD is also a copy instruction but it requires
// special way of handling. It is more complex copy version
// and since that we are not considering it. For recognition

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@ -101,6 +101,12 @@ protected:
unsigned OpIdx1,
unsigned OpIdx2) const override;
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
const MachineOperand *&Destination) const override;
public:
// Return whether the target has an explicit NOP encoding.
bool hasNOP() const;
@ -201,9 +207,6 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned SrcReg, bool isKill, int FrameIndex,

View File

@ -97,9 +97,9 @@ void Mips16InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MIB.addReg(SrcReg, getKillRegState(KillSrc));
}
bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
bool Mips16InstrInfo::isCopyInstrImpl(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
Dest = &MI.getOperand(0);
Src = &MI.getOperand(1);

View File

@ -53,9 +53,6 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned SrcReg, bool isKill, int FrameIndex,
@ -105,6 +102,14 @@ public:
void BuildAddiuSpImm
(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const;
protected:
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
const MachineOperand *&Destination) const override;
private:
unsigned getAnalyzableBrOpc(unsigned Opc) const override;

View File

@ -222,9 +222,9 @@ static bool isReadOrWriteToDSPReg(const MachineInstr &MI, bool &isWrite) {
/// We check for the common case of 'or', as it's MIPS' preferred instruction
/// for GPRs but we have to check the operands to ensure that is the case.
/// Other move instructions for MIPS are directly identifiable.
bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
bool MipsSEInstrInfo::isCopyInstrImpl(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
bool isDSPControlWrite = false;
// Condition is made to match the creation of WRDSP/RDDSP copy instruction
// from copyPhysReg function.

View File

@ -47,9 +47,6 @@ public:
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStack(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, bool isKill, int FrameIndex,
@ -79,6 +76,13 @@ public:
MachineBasicBlock::iterator II, const DebugLoc &DL,
unsigned *NewImm) const;
protected:
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
const MachineOperand *&Destination) const override;
private:
unsigned getAnalyzableBrOpc(unsigned Opc) const override;

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@ -3112,9 +3112,9 @@ void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
llvm_unreachable("Cannot emit physreg copy instruction");
}
bool X86InstrInfo::isCopyInstr(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
bool X86InstrInfo::isCopyInstrImpl(const MachineInstr &MI,
const MachineOperand *&Src,
const MachineOperand *&Dest) const {
if (MI.isMoveReg()) {
Dest = &MI.getOperand(0);
Src = &MI.getOperand(1);

View File

@ -349,8 +349,6 @@ public:
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
bool KillSrc) const override;
bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src,
const MachineOperand *&Dest) const override;
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, unsigned SrcReg,
bool isKill, int FrameIndex,
@ -576,6 +574,12 @@ protected:
unsigned CommuteOpIdx1,
unsigned CommuteOpIdx2) const override;
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return true along with
/// @Source machine operand and @Destination machine operand.
bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source,
const MachineOperand *&Destination) const override;
private:
MachineInstr *convertToThreeAddressWithLEA(unsigned MIOpc,
MachineFunction::iterator &MFI,