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Revert r253923.

Browse Source 
Per Eric's request.

llvm-svn: 253928
This commit is contained in:
Krzysztof Parzyszek 2015-11-23 22:19:57 +00:00
parent 5fba38a9da
commit af76cac3cc
5 changed files with 113 additions and 213 deletions
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190
include/llvm/CodeGen/MachineValueType.h
View File

@ -62,60 +62,47 @@ class MVT {
v16i1 = 16, // 16 x i1
v32i1 = 17, // 32 x i1
v64i1 = 18, // 64 x i1
v512i1 = 19, // 512 x i1
v1024i1 = 20, // 1024 x i1
v1i8 = 21, // 1 x i8
v2i8 = 22, // 2 x i8
v4i8 = 23, // 4 x i8
v8i8 = 24, // 8 x i8
v16i8 = 25, // 16 x i8
v32i8 = 26, // 32 x i8
v64i8 = 27, // 64 x i8
v128i8 = 28, //128 x i8
v256i8 = 29, //256 x i8
v1i16 = 30, // 1 x i16
v2i16 = 31, // 2 x i16
v4i16 = 32, // 4 x i16
v8i16 = 33, // 8 x i16
v16i16 = 34, // 16 x i16
v32i16 = 35, // 32 x i16
v64i16 = 36, // 64 x i16
v128i16 = 37, //128 x i16
v1i32 = 38, // 1 x i32
v2i32 = 39, // 2 x i32
v4i32 = 40, // 4 x i32
v8i32 = 41, // 8 x i32
v16i32 = 42, // 16 x i32
v32i32 = 43, // 32 x i32
v64i32 = 44, // 64 x i32
v1i64 = 45, // 1 x i64
v2i64 = 46, // 2 x i64
v4i64 = 47, // 4 x i64
v8i64 = 48, // 8 x i64
v16i64 = 49, // 16 x i64
v32i64 = 50, // 32 x i64
v1i128 = 51, // 1 x i128
v1i8 = 19, // 1 x i8
v2i8 = 20, // 2 x i8
v4i8 = 21, // 4 x i8
v8i8 = 22, // 8 x i8
v16i8 = 23, // 16 x i8
v32i8 = 24, // 32 x i8
v64i8 = 25, // 64 x i8
v1i16 = 26, // 1 x i16
v2i16 = 27, // 2 x i16
v4i16 = 28, // 4 x i16
v8i16 = 29, // 8 x i16
v16i16 = 30, // 16 x i16
v32i16 = 31, // 32 x i16
v1i32 = 32, // 1 x i32
v2i32 = 33, // 2 x i32
v4i32 = 34, // 4 x i32
v8i32 = 35, // 8 x i32
v16i32 = 36, // 16 x i32
v1i64 = 37, // 1 x i64
v2i64 = 38, // 2 x i64
v4i64 = 39, // 4 x i64
v8i64 = 40, // 8 x i64
v16i64 = 41, // 16 x i64
v1i128 = 42, // 1 x i128
FIRST_INTEGER_VECTOR_VALUETYPE = v2i1,
LAST_INTEGER_VECTOR_VALUETYPE = v1i128,
v2f16 = 52, // 2 x f16
v4f16 = 53, // 4 x f16
v8f16 = 54, // 8 x f16
v1f32 = 55, // 1 x f32
v2f32 = 56, // 2 x f32
v4f32 = 57, // 4 x f32
v8f32 = 58, // 8 x f32
v16f32 = 59, // 16 x f32
v1f64 = 60, // 1 x f64
v2f64 = 61, // 2 x f64
v4f64 = 62, // 4 x f64
v8f64 = 63, // 8 x f64
v2f16 = 43, // 2 x f16
v4f16 = 44, // 4 x f16
v8f16 = 45, // 8 x f16
v1f32 = 46, // 1 x f32
v2f32 = 47, // 2 x f32
v4f32 = 48, // 4 x f32
v8f32 = 49, // 8 x f32
v16f32 = 50, // 16 x f32
v1f64 = 51, // 1 x f64
v2f64 = 52, // 2 x f64
v4f64 = 53, // 4 x f64
v8f64 = 54, // 8 x f64
FIRST_FP_VECTOR_VALUETYPE = v2f16,
LAST_FP_VECTOR_VALUETYPE = v8f64,
@ -123,23 +110,23 @@ class MVT {
FIRST_VECTOR_VALUETYPE = v2i1,
LAST_VECTOR_VALUETYPE = v8f64,
x86mmx = 64, // This is an X86 MMX value
x86mmx = 55, // This is an X86 MMX value
Glue = 65, // This glues nodes together during pre-RA sched
Glue = 56, // This glues nodes together during pre-RA sched
isVoid = 66, // This has no value
isVoid = 57, // This has no value
Untyped = 67, // This value takes a register, but has
Untyped = 58, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
FIRST_VALUETYPE = 0, // This is always the beginning of the list.
LAST_VALUETYPE = 68, // This always remains at the end of the list.
LAST_VALUETYPE = 59, // This always remains at the end of the list.
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
// This value must be a multiple of 32.
MAX_ALLOWED_VALUETYPE = 128,
MAX_ALLOWED_VALUETYPE = 64,
// Token - A value of type llvm::TokenTy
token = 249,
@ -254,23 +241,14 @@ class MVT {
/// is512BitVector - Return true if this is a 512-bit vector type.
bool is512BitVector() const {
return (SimpleTy == MVT::v8f64 || SimpleTy == MVT::v16f32 ||
SimpleTy == MVT::v64i8 || SimpleTy == MVT::v32i16 ||
SimpleTy == MVT::v512i1 ||
SimpleTy == MVT::v8i64 || SimpleTy == MVT::v16i32);
return (SimpleTy == MVT::v8f64 || SimpleTy == MVT::v16f32 ||
SimpleTy == MVT::v64i8 || SimpleTy == MVT::v32i16 ||
SimpleTy == MVT::v8i64 || SimpleTy == MVT::v16i32);
}
/// is1024BitVector - Return true if this is a 1024-bit vector type.
bool is1024BitVector() const {
return (SimpleTy == MVT::v16i64 || SimpleTy == MVT::v32i32 ||
SimpleTy == MVT::v1024i1 ||
SimpleTy == MVT::v64i16 || SimpleTy == MVT::v128i8);
}
/// is2048BitVector - Return true if this is a 1024-bit vector type.
bool is2048BitVector() const {
return (SimpleTy == MVT::v32i64 || SimpleTy == MVT::v64i32 ||
SimpleTy == MVT::v128i16 || SimpleTy == MVT::v256i8);
return (SimpleTy == MVT::v16i64);
}
/// isOverloaded - Return true if this is an overloaded type for TableGen.
@ -307,44 +285,35 @@ class MVT {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
case v2i1:
case v4i1:
case v8i1:
case v16i1:
case v32i1:
case v64i1:
case v512i1:
case v1024i1: return i1;
case v1i8:
case v2i8:
case v4i8:
case v8i8:
case v2i1 :
case v4i1 :
case v8i1 :
case v16i1 :
case v32i1 :
case v64i1: return i1;
case v1i8 :
case v2i8 :
case v4i8 :
case v8i8 :
case v16i8:
case v32i8:
case v64i8:
case v128i8:
case v256i8: return i8;
case v64i8: return i8;
case v1i16:
case v2i16:
case v4i16:
case v8i16:
case v16i16:
case v32i16:
case v64i16:
case v128i16: return i16;
case v32i16: return i16;
case v1i32:
case v2i32:
case v4i32:
case v8i32:
case v16i32:
case v32i32:
case v64i32: return i32;
case v16i32: return i32;
case v1i64:
case v2i64:
case v4i64:
case v8i64:
case v16i64:
case v32i64: return i64;
case v16i64: return i64;
case v1i128: return i128;
case v2f16:
case v4f16:
@ -365,28 +334,19 @@ class MVT {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
case v1024i1: return 1024;
case v512i1: return 512;
case v256i8: return 256;
case v128i8:
case v128i16: return 128;
case v64i1:
case v64i8:
case v64i16:
case v64i32: return 64;
case v32i1:
case v32i8:
case v32i16:
case v32i32:
case v32i64: return 32;
case v32i16: return 32;
case v64i1:
case v64i8: return 64;
case v16i1:
case v16i8:
case v16i16:
case v16i32:
case v16i64:
case v16f32: return 16;
case v8i1:
case v8i8:
case v8i1 :
case v8i8 :
case v8i16:
case v8i32:
case v8i64:
@ -486,22 +446,13 @@ class MVT {
case v4i64:
case v8f32:
case v4f64: return 256;
case v512i1:
case v64i8:
case v32i16:
case v16i32:
case v8i64:
case v16f32:
case v8f64: return 512;
case v1024i1:
case v128i8:
case v64i16:
case v32i32:
case v16i64: return 1024;
case v256i8:
case v128i16:
case v64i32:
case v32i64: return 2048;
case v16i64:return 1024;
}
}
@ -589,8 +540,6 @@ class MVT {
if (NumElements == 16) return MVT::v16i1;
if (NumElements == 32) return MVT::v32i1;
if (NumElements == 64) return MVT::v64i1;
if (NumElements == 512) return MVT::v512i1;
if (NumElements == 1024) return MVT::v1024i1;
break;
case MVT::i8:
if (NumElements == 1) return MVT::v1i8;
@ -600,8 +549,6 @@ class MVT {
if (NumElements == 16) return MVT::v16i8;
if (NumElements == 32) return MVT::v32i8;
if (NumElements == 64) return MVT::v64i8;
if (NumElements == 128) return MVT::v128i8;
if (NumElements == 256) return MVT::v256i8;
break;
case MVT::i16:
if (NumElements == 1) return MVT::v1i16;
@ -610,8 +557,6 @@ class MVT {
if (NumElements == 8) return MVT::v8i16;
if (NumElements == 16) return MVT::v16i16;
if (NumElements == 32) return MVT::v32i16;
if (NumElements == 64) return MVT::v64i16;
if (NumElements == 128) return MVT::v128i16;
break;
case MVT::i32:
if (NumElements == 1) return MVT::v1i32;
@ -619,8 +564,6 @@ class MVT {
if (NumElements == 4) return MVT::v4i32;
if (NumElements == 8) return MVT::v8i32;
if (NumElements == 16) return MVT::v16i32;
if (NumElements == 32) return MVT::v32i32;
if (NumElements == 64) return MVT::v64i32;
break;
case MVT::i64:
if (NumElements == 1) return MVT::v1i64;
@ -628,7 +571,6 @@ class MVT {
if (NumElements == 4) return MVT::v4i64;
if (NumElements == 8) return MVT::v8i64;
if (NumElements == 16) return MVT::v16i64;
if (NumElements == 32) return MVT::v32i64;
break;
case MVT::i128:
if (NumElements == 1) return MVT::v1i128;

6
include/llvm/CodeGen/ValueTypes.h
View File

@ -164,11 +164,6 @@ namespace llvm {
return isSimple() ? V.is1024BitVector() : isExtended1024BitVector();
}
/// is2048BitVector - Return true if this is a 2048-bit vector type.
bool is2048BitVector() const {
return isSimple() ? V.is2048BitVector() : isExtended2048BitVector();
}
/// isOverloaded - Return true if this is an overloaded type for TableGen.
bool isOverloaded() const {
return (V==MVT::iAny || V==MVT::fAny || V==MVT::vAny || V==MVT::iPTRAny);
@ -375,7 +370,6 @@ namespace llvm {
bool isExtended256BitVector() const LLVM_READONLY;
bool isExtended512BitVector() const LLVM_READONLY;
bool isExtended1024BitVector() const LLVM_READONLY;
bool isExtended2048BitVector() const LLVM_READONLY;
EVT getExtendedVectorElementType() const;
unsigned getExtendedVectorNumElements() const LLVM_READONLY;
unsigned getExtendedSizeInBits() const;

106
include/llvm/CodeGen/ValueTypes.td
View File

@ -33,69 +33,55 @@ def f80 : ValueType<80 , 10>; // 80-bit floating point value
def f128 : ValueType<128, 11>; // 128-bit floating point value
def ppcf128: ValueType<128, 12>; // PPC 128-bit floating point value
def v2i1 : ValueType<2 , 13>; // 2 x i1 vector value
def v4i1 : ValueType<4 , 14>; // 4 x i1 vector value
def v8i1 : ValueType<8 , 15>; // 8 x i1 vector value
def v16i1 : ValueType<16, 16>; // 16 x i1 vector value
def v32i1 : ValueType<32 , 17>; // 32 x i1 vector value
def v64i1 : ValueType<64 , 18>; // 64 x i1 vector value
def v512i1 : ValueType<512, 19>; // 512 x i8 vector value
def v1024i1: ValueType<1024,20>; //1024 x i8 vector value
def v2i1 : ValueType<2 , 13>; // 2 x i1 vector value
def v4i1 : ValueType<4 , 14>; // 4 x i1 vector value
def v8i1 : ValueType<8 , 15>; // 8 x i1 vector value
def v16i1 : ValueType<16, 16>; // 16 x i1 vector value
def v32i1 : ValueType<32 , 17>; // 32 x i1 vector value
def v64i1 : ValueType<64 , 18>; // 64 x i1 vector value
def v1i8 : ValueType<16, 19>; // 1 x i8 vector value
def v2i8 : ValueType<16 , 20>; // 2 x i8 vector value
def v4i8 : ValueType<32 , 21>; // 4 x i8 vector value
def v8i8 : ValueType<64 , 22>; // 8 x i8 vector value
def v16i8 : ValueType<128, 23>; // 16 x i8 vector value
def v32i8 : ValueType<256, 24>; // 32 x i8 vector value
def v64i8 : ValueType<512, 25>; // 64 x i8 vector value
def v1i16 : ValueType<16 , 26>; // 1 x i16 vector value
def v2i16 : ValueType<32 , 27>; // 2 x i16 vector value
def v4i16 : ValueType<64 , 28>; // 4 x i16 vector value
def v8i16 : ValueType<128, 29>; // 8 x i16 vector value
def v16i16 : ValueType<256, 30>; // 16 x i16 vector value
def v32i16 : ValueType<512, 31>; // 32 x i16 vector value
def v1i32 : ValueType<32 , 32>; // 1 x i32 vector value
def v2i32 : ValueType<64 , 33>; // 2 x i32 vector value
def v4i32 : ValueType<128, 34>; // 4 x i32 vector value
def v8i32 : ValueType<256, 35>; // 8 x i32 vector value
def v16i32 : ValueType<512, 36>; // 16 x i32 vector value
def v1i64 : ValueType<64 , 37>; // 1 x i64 vector value
def v2i64 : ValueType<128, 38>; // 2 x i64 vector value
def v4i64 : ValueType<256, 39>; // 4 x i64 vector value
def v8i64 : ValueType<512, 40>; // 8 x i64 vector value
def v16i64 : ValueType<1024,41>; // 16 x i64 vector value
def v1i128 : ValueType<128, 42>; // 1 x i128 vector value
def v1i8 : ValueType<16, 21>; // 1 x i8 vector value
def v2i8 : ValueType<16 , 22>; // 2 x i8 vector value
def v4i8 : ValueType<32 , 23>; // 4 x i8 vector value
def v8i8 : ValueType<64 , 24>; // 8 x i8 vector value
def v16i8 : ValueType<128, 25>; // 16 x i8 vector value
def v32i8 : ValueType<256, 26>; // 32 x i8 vector value
def v64i8 : ValueType<512, 27>; // 64 x i8 vector value
def v128i8 : ValueType<1024,28>; //128 x i8 vector value
def v256i8 : ValueType<2048,29>; //256 x i8 vector value
def v1i16 : ValueType<16 , 30>; // 1 x i16 vector value
def v2i16 : ValueType<32 , 31>; // 2 x i16 vector value
def v4i16 : ValueType<64 , 32>; // 4 x i16 vector value
def v8i16 : ValueType<128, 33>; // 8 x i16 vector value
def v16i16 : ValueType<256, 34>; // 16 x i16 vector value
def v32i16 : ValueType<512, 35>; // 32 x i16 vector value
def v64i16 : ValueType<1024,36>; // 64 x i16 vector value
def v128i16: ValueType<2048,37>; //128 x i16 vector value
def v1i32 : ValueType<32 , 38>; // 1 x i32 vector value
def v2i32 : ValueType<64 , 39>; // 2 x i32 vector value
def v4i32 : ValueType<128, 40>; // 4 x i32 vector value
def v8i32 : ValueType<256, 41>; // 8 x i32 vector value
def v16i32 : ValueType<512, 42>; // 16 x i32 vector value
def v32i32 : ValueType<1024,43>; // 32 x i32 vector value
def v64i32 : ValueType<2048,44>; // 32 x i32 vector value
def v1i64 : ValueType<64 , 45>; // 1 x i64 vector value
def v2i64 : ValueType<128, 46>; // 2 x i64 vector value
def v4i64 : ValueType<256, 47>; // 4 x i64 vector value
def v8i64 : ValueType<512, 48>; // 8 x i64 vector value
def v16i64 : ValueType<1024,49>; // 16 x i64 vector value
def v32i64 : ValueType<2048,50>; // 32 x i64 vector value
def v1i128 : ValueType<128, 51>; // 1 x i128 vector value
def v2f16 : ValueType<32 , 52>; // 2 x f16 vector value
def v4f16 : ValueType<64 , 53>; // 4 x f16 vector value
def v8f16 : ValueType<128, 54>; // 8 x f16 vector value
def v1f32 : ValueType<32 , 55>; // 1 x f32 vector value
def v2f32 : ValueType<64 , 56>; // 2 x f32 vector value
def v4f32 : ValueType<128, 57>; // 4 x f32 vector value
def v8f32 : ValueType<256, 58>; // 8 x f32 vector value
def v16f32 : ValueType<512, 59>; // 16 x f32 vector value
def v1f64 : ValueType<64, 60>; // 1 x f64 vector value
def v2f64 : ValueType<128, 61>; // 2 x f64 vector value
def v4f64 : ValueType<256, 62>; // 4 x f64 vector value
def v8f64 : ValueType<512, 63>; // 8 x f64 vector value
def v2f16 : ValueType<32 , 43>; // 2 x f16 vector value
def v4f16 : ValueType<64 , 44>; // 4 x f16 vector value
def v8f16 : ValueType<128, 45>; // 8 x f16 vector value
def v1f32 : ValueType<32 , 46>; // 1 x f32 vector value
def v2f32 : ValueType<64 , 47>; // 2 x f32 vector value
def v4f32 : ValueType<128, 48>; // 4 x f32 vector value
def v8f32 : ValueType<256, 49>; // 8 x f32 vector value
def v16f32 : ValueType<512, 50>; // 16 x f32 vector value
def v1f64 : ValueType<64, 51>; // 1 x f64 vector value
def v2f64 : ValueType<128, 52>; // 2 x f64 vector value
def v4f64 : ValueType<256, 53>; // 4 x f64 vector value
def v8f64 : ValueType<512, 54>; // 8 x f64 vector value
def x86mmx : ValueType<64 , 64>; // X86 MMX value
def FlagVT : ValueType<0 , 65>; // Pre-RA sched glue
def isVoid : ValueType<0 , 66>; // Produces no value
def untyped: ValueType<8 , 67>; // Produces an untyped value
def x86mmx : ValueType<64 , 55>; // X86 MMX value
def FlagVT : ValueType<0 , 56>; // Pre-RA sched glue
def isVoid : ValueType<0 , 57>; // Produces no value
def untyped: ValueType<8 , 58>; // Produces an untyped value
def token : ValueType<0 , 249>; // TokenTy
def MetadataVT: ValueType<0, 250>; // Metadata

22
lib/IR/ValueTypes.cpp
View File

@ -88,10 +88,6 @@ bool EVT::isExtended1024BitVector() const {
return isExtendedVector() && getExtendedSizeInBits() == 1024;
}
bool EVT::isExtended2048BitVector() const {
return isExtendedVector() && getExtendedSizeInBits() == 2048;
}
EVT EVT::getExtendedVectorElementType() const {
assert(isExtended() && "Type is not extended!");
return EVT::getEVT(cast<VectorType>(LLVMTy)->getElementType());
@ -143,8 +139,6 @@ std::string EVT::getEVTString() const {
case MVT::v16i1: return "v16i1";
case MVT::v32i1: return "v32i1";
case MVT::v64i1: return "v64i1";
case MVT::v512i1: return "v512i1";
case MVT::v1024i1: return "v1024i1";
case MVT::v1i8: return "v1i8";
case MVT::v2i8: return "v2i8";
case MVT::v4i8: return "v4i8";
@ -152,29 +146,22 @@ std::string EVT::getEVTString() const {
case MVT::v16i8: return "v16i8";
case MVT::v32i8: return "v32i8";
case MVT::v64i8: return "v64i8";
case MVT::v128i8: return "v128i8";
case MVT::v256i8: return "v256i8";
case MVT::v1i16: return "v1i16";
case MVT::v2i16: return "v2i16";
case MVT::v4i16: return "v4i16";
case MVT::v8i16: return "v8i16";
case MVT::v16i16: return "v16i16";
case MVT::v32i16: return "v32i16";
case MVT::v64i16: return "v64i16";
case MVT::v128i16: return "v128i16";
case MVT::v1i32: return "v1i32";
case MVT::v2i32: return "v2i32";
case MVT::v4i32: return "v4i32";
case MVT::v8i32: return "v8i32";
case MVT::v16i32: return "v16i32";
case MVT::v32i32: return "v32i32";
case MVT::v64i32: return "v64i32";
case MVT::v1i64: return "v1i64";
case MVT::v2i64: return "v2i64";
case MVT::v4i64: return "v4i64";
case MVT::v8i64: return "v8i64";
case MVT::v16i64: return "v16i64";
case MVT::v32i64: return "v32i64";
case MVT::v1i128: return "v1i128";
case MVT::v1f32: return "v1f32";
case MVT::v2f32: return "v2f32";
@ -221,8 +208,6 @@ Type *EVT::getTypeForEVT(LLVMContext &Context) const {
case MVT::v16i1: return VectorType::get(Type::getInt1Ty(Context), 16);
case MVT::v32i1: return VectorType::get(Type::getInt1Ty(Context), 32);
case MVT::v64i1: return VectorType::get(Type::getInt1Ty(Context), 64);
case MVT::v512i1: return VectorType::get(Type::getInt1Ty(Context), 512);
case MVT::v1024i1: return VectorType::get(Type::getInt1Ty(Context), 1024);
case MVT::v1i8: return VectorType::get(Type::getInt8Ty(Context), 1);
case MVT::v2i8: return VectorType::get(Type::getInt8Ty(Context), 2);
case MVT::v4i8: return VectorType::get(Type::getInt8Ty(Context), 4);
@ -230,29 +215,22 @@ Type *EVT::getTypeForEVT(LLVMContext &Context) const {
case MVT::v16i8: return VectorType::get(Type::getInt8Ty(Context), 16);
case MVT::v32i8: return VectorType::get(Type::getInt8Ty(Context), 32);
case MVT::v64i8: return VectorType::get(Type::getInt8Ty(Context), 64);
case MVT::v128i8: return VectorType::get(Type::getInt8Ty(Context), 128);
case MVT::v256i8: return VectorType::get(Type::getInt8Ty(Context), 256);
case MVT::v1i16: return VectorType::get(Type::getInt16Ty(Context), 1);
case MVT::v2i16: return VectorType::get(Type::getInt16Ty(Context), 2);
case MVT::v4i16: return VectorType::get(Type::getInt16Ty(Context), 4);
case MVT::v8i16: return VectorType::get(Type::getInt16Ty(Context), 8);
case MVT::v16i16: return VectorType::get(Type::getInt16Ty(Context), 16);
case MVT::v32i16: return VectorType::get(Type::getInt16Ty(Context), 32);
case MVT::v64i16: return VectorType::get(Type::getInt16Ty(Context), 64);
case MVT::v128i16: return VectorType::get(Type::getInt16Ty(Context), 128);
case MVT::v1i32: return VectorType::get(Type::getInt32Ty(Context), 1);
case MVT::v2i32: return VectorType::get(Type::getInt32Ty(Context), 2);
case MVT::v4i32: return VectorType::get(Type::getInt32Ty(Context), 4);
case MVT::v8i32: return VectorType::get(Type::getInt32Ty(Context), 8);
case MVT::v16i32: return VectorType::get(Type::getInt32Ty(Context), 16);
case MVT::v32i32: return VectorType::get(Type::getInt32Ty(Context), 32);
case MVT::v64i32: return VectorType::get(Type::getInt32Ty(Context), 64);
case MVT::v1i64: return VectorType::get(Type::getInt64Ty(Context), 1);
case MVT::v2i64: return VectorType::get(Type::getInt64Ty(Context), 2);
case MVT::v4i64: return VectorType::get(Type::getInt64Ty(Context), 4);
case MVT::v8i64: return VectorType::get(Type::getInt64Ty(Context), 8);
case MVT::v16i64: return VectorType::get(Type::getInt64Ty(Context), 16);
case MVT::v32i64: return VectorType::get(Type::getInt64Ty(Context), 32);
case MVT::v1i128: return VectorType::get(Type::getInt128Ty(Context), 1);
case MVT::v2f16: return VectorType::get(Type::getHalfTy(Context), 2);
case MVT::v4f16: return VectorType::get(Type::getHalfTy(Context), 4);

2
test/TableGen/intrinsic-varargs.td
View File

@ -23,7 +23,7 @@ class Intrinsic<string name, list<LLVMType> param_types = []> {
}
// isVoid needs to match the definition in ValueTypes.td
def isVoid : ValueType<0, 66>; // Produces no value
def isVoid : ValueType<0, 57>; // Produces no value
def llvm_vararg_ty : LLVMType<isVoid>; // this means vararg here
// CHECK: /* 0 */ 0, 29, 0,