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[PeepholeOptimizer] Don't assume bitcast def always has input
Summary: If we have a MI marked with bitcast bits, but without input operands, PeepholeOptimizer might crash with assert. eg: If we apply the changes in PPCInstrVSX.td as in this patch: [(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>; We will get assert in PeepholeOptimizer. ``` llvm-lit llvm-project/llvm/test/CodeGen/PowerPC/build-vector-tests.ll -v llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h:417: const llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int) const: Assertion `i < getNumOperands() && "getOperand() out of range!"' failed. ``` The fix is to abort if we found out of bound access. Reviewers: qcolombet, MatzeB, hfinkel, arsenm Reviewed By: qcolombet Subscribers: wdng, arsenm, steven.zhang, wuzish, nemanjai, hiraditya, kbarton, MaskRay, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65542 llvm-svn: 369261
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@ -1853,6 +1853,11 @@ ValueTrackerResult ValueTracker::getNextSourceFromBitcast() {
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SrcIdx = OpIdx;
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}
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// In some rare case, Def has no input, SrcIdx is out of bound,
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// getOperand(SrcIdx) will fail below.
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if (SrcIdx >= Def->getNumOperands())
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return ValueTrackerResult();
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// Stop when any user of the bitcast is a SUBREG_TO_REG, replacing with a COPY
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// will break the assumed guarantees for the upper bits.
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for (const MachineInstr &UseMI : MRI.use_nodbg_instructions(DefOp.getReg())) {
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@ -1314,7 +1314,7 @@ let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns.
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isReMaterializable = 1 in {
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def XXLEQVOnes : XX3Form_SameOp<60, 186, (outs vsrc:$XT), (ins),
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"xxleqv $XT, $XT, $XT", IIC_VecGeneral,
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[(set v4i32:$XT, (v4i32 immAllOnesV))]>;
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[(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>;
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}
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def XXLORC : XX3Form<60, 170,
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@ -4103,8 +4103,6 @@ let AddedComplexity = 400 in {
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}
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let Predicates = [HasP8Vector] in {
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def : Pat<(v4i32 (bitconvert (v16i8 immAllOnesV))),
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(XXLEQVOnes)>;
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def : Pat<(v1i128 (bitconvert (v16i8 immAllOnesV))),
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(v1i128 (COPY_TO_REGCLASS(XXLEQVOnes), VSRC))>;
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def : Pat<(v2i64 (bitconvert (v16i8 immAllOnesV))),
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23
test/CodeGen/PowerPC/bitcast-peephole.mir
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23
test/CodeGen/PowerPC/bitcast-peephole.mir
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@ -0,0 +1,23 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=powerpc64le-linux-gnu -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: bitCast
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: bitCast
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; CHECK: [[XXLEQVOnes:%[0-9]+]]:vsrc = XXLEQVOnes
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; CHECK: $v2 = COPY [[XXLEQVOnes]]
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; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $v2
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%0:vsrc = XXLEQVOnes
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$v2 = COPY %0
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BLR8 implicit $lr8, implicit $rm, implicit $v2
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...
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# This used to hit an assertion:
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# llvm/include/llvm/CodeGen/MachineInstr.h:417: const
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# llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int)
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# const: Assertion `i < getNumOperands() && "getOperand() out of range!"' failed.
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#
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