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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00

[PeepholeOptimizer] Don't assume bitcast def always has input

Summary:
If we have a MI marked with bitcast bits, but without input operands,
PeepholeOptimizer might crash with assert.

eg:
If we apply the changes in PPCInstrVSX.td as in this patch:

[(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>;

We will get assert in PeepholeOptimizer.

```
llvm-lit llvm-project/llvm/test/CodeGen/PowerPC/build-vector-tests.ll -v

llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h:417: const
llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int)
const: Assertion `i < getNumOperands() && "getOperand() out of range!"'
failed.
```

The fix is to abort if we found out of bound access.

Reviewers: qcolombet, MatzeB, hfinkel, arsenm

Reviewed By: qcolombet

Subscribers: wdng, arsenm, steven.zhang, wuzish, nemanjai, hiraditya, kbarton, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65542

llvm-svn: 369261
This commit is contained in:
Jinsong Ji 2019-08-19 14:19:04 +00:00
parent 6f3092d9ba
commit af77a2caf6
3 changed files with 29 additions and 3 deletions

View File

@ -1853,6 +1853,11 @@ ValueTrackerResult ValueTracker::getNextSourceFromBitcast() {
SrcIdx = OpIdx;
}
// In some rare case, Def has no input, SrcIdx is out of bound,
// getOperand(SrcIdx) will fail below.
if (SrcIdx >= Def->getNumOperands())
return ValueTrackerResult();
// Stop when any user of the bitcast is a SUBREG_TO_REG, replacing with a COPY
// will break the assumed guarantees for the upper bits.
for (const MachineInstr &UseMI : MRI.use_nodbg_instructions(DefOp.getReg())) {

View File

@ -1314,7 +1314,7 @@ let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns.
isReMaterializable = 1 in {
def XXLEQVOnes : XX3Form_SameOp<60, 186, (outs vsrc:$XT), (ins),
"xxleqv $XT, $XT, $XT", IIC_VecGeneral,
[(set v4i32:$XT, (v4i32 immAllOnesV))]>;
[(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>;
}
def XXLORC : XX3Form<60, 170,
@ -4103,8 +4103,6 @@ let AddedComplexity = 400 in {
}
let Predicates = [HasP8Vector] in {
def : Pat<(v4i32 (bitconvert (v16i8 immAllOnesV))),
(XXLEQVOnes)>;
def : Pat<(v1i128 (bitconvert (v16i8 immAllOnesV))),
(v1i128 (COPY_TO_REGCLASS(XXLEQVOnes), VSRC))>;
def : Pat<(v2i64 (bitconvert (v16i8 immAllOnesV))),

View File

@ -0,0 +1,23 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=powerpc64le-linux-gnu -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s
---
name: bitCast
tracksRegLiveness: true
body: |
bb.0.entry:
; CHECK-LABEL: name: bitCast
; CHECK: [[XXLEQVOnes:%[0-9]+]]:vsrc = XXLEQVOnes
; CHECK: $v2 = COPY [[XXLEQVOnes]]
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $v2
%0:vsrc = XXLEQVOnes
$v2 = COPY %0
BLR8 implicit $lr8, implicit $rm, implicit $v2
...
# This used to hit an assertion:
# llvm/include/llvm/CodeGen/MachineInstr.h:417: const
# llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int)
# const: Assertion `i < getNumOperands() && "getOperand() out of range!"' failed.
#