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Remove getImmediateForOpcode, which is now dead.
Patch by Jim Laskey. llvm-svn: 22716
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@ -673,65 +673,6 @@ static unsigned Lo16(unsigned x) { return x & 0x0000FFFF; }
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static unsigned Hi16(unsigned x) { return Lo16(x >> 16); }
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static unsigned HA16(unsigned x) { return Hi16((signed)x - (signed short)x); }
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/// getImmediateForOpcode - This method returns a value indicating whether
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/// the ConstantSDNode N can be used as an immediate to Opcode. The return
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/// values are either 0, 1 or 2. 0 indicates that either N is not a
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/// ConstantSDNode, or is not suitable for use by that opcode.
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/// Return value codes for turning into an enum someday:
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/// 1: constant may be used in normal immediate form.
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/// 2: constant may be used in shifted immediate form.
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/// 3: log base 2 of the constant may be used.
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/// 4: constant is suitable for integer division conversion
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/// 5: constant is a bitfield mask
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///
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static unsigned getImmediateForOpcode(SDOperand N, unsigned Opcode,
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unsigned& Imm, bool U = false) {
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if (N.getOpcode() != ISD::Constant) return 0;
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int v = (int)cast<ConstantSDNode>(N)->getSignExtended();
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switch(Opcode) {
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default: return 0;
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case ISD::ADD:
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if (isInt16(v)) { Imm = v & 0xFFFF; return 1; }
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if ((v & 0x0000FFFF) == 0) { Imm = v >> 16; return 2; }
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break;
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case ISD::AND: {
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unsigned MB, ME;
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if (isRunOfOnes(v, MB, ME)) { Imm = MB << 16 | ME & 0xFFFF; return 5; }
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if (isUInt16(v)) { Imm = v & 0xFFFF; return 1; }
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if ((v & 0x0000FFFF) == 0) { Imm = v >> 16; return 2; }
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break;
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}
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case ISD::XOR:
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case ISD::OR:
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if (isUInt16(v)) { Imm = v & 0xFFFF; return 1; }
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if ((v & 0x0000FFFF) == 0) { Imm = v >> 16; return 2; }
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break;
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case ISD::MUL:
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if (isInt16(v)) { Imm = v & 0xFFFF; return 1; }
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break;
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case ISD::SUB:
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// handle subtract-from separately from subtract, since subi is really addi
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if (U && isInt16(v)) { Imm = v & 0xFFFF; return 1; }
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if (!U && isInt16(-v)) { Imm = (-v) & 0xFFFF; return 1; }
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break;
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case ISD::SETCC:
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if (U && isUInt16(v)) { Imm = v & 0xFFFF; return 1; }
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if (!U && isInt16(v)) { Imm = v & 0xFFFF; return 1; }
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break;
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case ISD::SDIV:
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if (isPowerOf2_32(v)) { Imm = Log2_32(v); return 3; }
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if (isPowerOf2_32(-v)) { Imm = Log2_32(-v); return 3; }
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if (v <= -2 || v >= 2) { return 4; }
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break;
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case ISD::UDIV:
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if (v > 1) { return 4; }
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break;
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}
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return 0;
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}
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/// NodeHasRecordingVariant - If SelectExpr can always produce code for
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/// NodeOpcode that also sets CR0 as a side effect, return true. Otherwise,
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/// return false.
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