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Encoding info for extension instructions.

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llvm-svn: 116560
This commit is contained in:
Jim Grosbach 2010-10-15 02:29:58 +00:00
parent 9e98b1cde0
commit b01bcbd047
1 changed files with 8 additions and 0 deletions
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8
lib/Target/ARM/ARMInstrInfo.td
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@ -614,6 +614,10 @@ multiclass AI_ext_rrot<bits<8> opcod, string opc, PatFrag opnode> {
IIC_iEXTr, opc, "\t$Rd, $Rm",
[(set GPR:$Rd, (opnode GPR:$Rm))]>,
Requires<[IsARM, HasV6]> {
bits<4> Rd;
bits<4> Rm;
let Inst{15-12} = Rd;
let Inst{3-0} = Rm;
let Inst{11-10} = 0b00;
let Inst{19-16} = 0b1111;
}
@ -621,8 +625,12 @@ multiclass AI_ext_rrot<bits<8> opcod, string opc, PatFrag opnode> {
IIC_iEXTr, opc, "\t$Rd, $Rm, ror $rot",
[(set GPR:$Rd, (opnode (rotr GPR:$Rm, rot_imm:$rot)))]>,
Requires<[IsARM, HasV6]> {
bits<4> Rd;
bits<4> Rm;
bits<2> rot;
let Inst{15-12} = Rd;
let Inst{11-10} = rot;
let Inst{3-0} = Rm;
let Inst{19-16} = 0b1111;
}
}