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Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
as the "Permanently UNDEFINED" instruction. llvm-svn: 95873
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@ -619,6 +619,16 @@ def DBG : AI<(outs), (ins i32imm:$opt), Pseudo, NoItinerary, "dbg", "\t$opt",
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let Inst{7-4} = 0b1111;
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}
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// A5.4 Permanently UNDEFINED instructions.
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def TRAP : AI<(outs), (ins), Pseudo, NoItinerary, "trap", "",
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[/* For disassembly only; pattern left blank */]>,
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Requires<[IsARM]> {
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let Inst{27-25} = 0b011;
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let Inst{24-20} = 0b11111;
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let Inst{7-5} = 0b111;
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let Inst{4} = 0b1;
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}
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// Address computation and loads and stores in PIC mode.
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let isNotDuplicable = 1 in {
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def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),
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