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[DAGCombiner] eliminate setcc bool math when input is low-bit of some value
This patch has the same motivating example as D48466:
define void @foo(i64 %x, i32 %c.0282.in, i32 %d.0280, i32* %ptr0, i32* %ptr1) {
%c.0282 = and i32 %c.0282.in, 268435455
%a16 = lshr i64 32508, %x
%a17 = and i64 %a16, 1
%tobool = icmp eq i64 %a17, 0
%. = select i1 %tobool, i32 1, i32 2
%.286 = select i1 %tobool, i32 27, i32 26
%shr97 = lshr i32 %c.0282, %.
%shl98 = shl i32 %c.0282.in, %.286
%or99 = or i32 %shr97, %shl98
%shr100 = lshr i32 %d.0280, %.
%shl101 = shl i32 %d.0280, %.286
%or102 = or i32 %shr100, %shl101
store i32 %or99, i32* %ptr0
store i32 %or102, i32* %ptr1
ret void
}
...but I'm trying to kill the setcc bool math sooner rather than later.
By matching a larger pattern that includes both the low-bit mask and the trailing add/sub,
we can create a universally good fold because we always eliminate the condition code
intermediate value.
Here are Alive proofs for these (currently instcombine folds the 'add' variants, but
misses the 'sub' patterns):
https://rise4fun.com/Alive/Gsyp
Name: sub of zext cmp mask
%a = and i8 %x, 1
%c = icmp eq i8 %a, 0
%z = zext i1 %c to i32
%r = sub i32 C1, %z
=>
%optional_cast = zext i8 %a to i32
%r = add i32 %optional_cast, C1-1
Name: add of zext cmp mask
%a = and i32 %x, 1
%c = icmp eq i32 %a, 0
%z = zext i1 %c to i8
%r = add i8 %z, C1
=>
%optional_cast = trunc i32 %a to i8
%r = sub i8 C1+1, %optional_cast
All of the tests look like improvements or neutral to me. But it is possible that x86
test+set+bitop is better than what we now show here. I suspect we could do better by
adding another fold for the 'sub' variants.
We start with select-of-constant in IR in the larger motivating test, so that's why I
included tests with selects. Proofs for those variants:
https://rise4fun.com/Alive/Bx1
Name: true const is bigger
Pre: C2 == (C1 + 1)
%a = and i8 %x, 1
%c = icmp eq i8 %a, 0
%r = select i1 %c, i64 C2, i64 C1
=>
%z = zext i8 %a to i64
%r = sub i64 C2, %z
Name: false const is bigger
Pre: C2 == (C1 + 1)
%a = and i8 %x, 1
%c = icmp eq i8 %a, 0
%r = select i1 %c, i64 C1, i64 C2
=>
%z = zext i8 %a to i64
%r = add i64 C1, %z
Differential Revision: https://reviews.llvm.org/D48466
llvm-svn: 335433
This commit is contained in:
Sanjay Patel
parent
ef0f201dac
commit
b2044ee5c4
@ -1949,6 +1949,45 @@ SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) {
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return DAG.getSelect(DL, VT, Sel.getOperand(0), NewCT, NewCF);
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}
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static SDValue foldAddSubBoolOfMaskedVal(SDNode *N, SelectionDAG &DAG) {
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assert(N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::SUB &&
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"Expecting add or sub");
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// Match a constant operand and a zext operand for the math instruction:
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// add Z, C
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// sub C, Z
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bool IsAdd = N->getOpcode() == ISD::ADD;
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SDValue C = IsAdd ? N->getOperand(1) : N->getOperand(0);
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SDValue Z = IsAdd ? N->getOperand(0) : N->getOperand(1);
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auto *CN = dyn_cast<ConstantSDNode>(C);
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if (!CN || Z.getOpcode() != ISD::ZERO_EXTEND)
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return SDValue();
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// Match the zext operand as a setcc of a boolean.
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if (Z.getOperand(0).getOpcode() != ISD::SETCC ||
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Z.getOperand(0).getValueType() != MVT::i1)
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return SDValue();
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// Match the compare as: setcc (X & 1), 0, eq.
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SDValue SetCC = Z.getOperand(0);
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ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
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if (CC != ISD::SETEQ || !isNullConstant(SetCC.getOperand(1)) ||
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SetCC.getOperand(0).getOpcode() != ISD::AND ||
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!isOneConstant(SetCC.getOperand(0).getOperand(1)))
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return SDValue();
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// We are adding/subtracting a constant and an inverted low bit. Turn that
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// into a subtract/add of the low bit with incremented/decremented constant:
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// add (zext i1 (seteq (X & 1), 0)), C --> sub C+1, (zext (X & 1))
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// sub C, (zext i1 (seteq (X & 1), 0)) --> add C-1, (zext (X & 1))
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EVT VT = C.getValueType();
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SDLoc DL(N);
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SDValue LowBit = DAG.getZExtOrTrunc(SetCC.getOperand(0), DL, VT);
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SDValue C1 = IsAdd ? DAG.getConstant(CN->getAPIntValue() + 1, DL, VT) :
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DAG.getConstant(CN->getAPIntValue() - 1, DL, VT);
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return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, C1, LowBit);
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}
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SDValue DAGCombiner::visitADD(SDNode *N) {
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SDValue N0 = N->getOperand(0);
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SDValue N1 = N->getOperand(1);
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@ -2080,6 +2119,9 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
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DAG.getNode(ISD::ADD, SDLoc(N1), VT, N01, N11));
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}
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if (SDValue V = foldAddSubBoolOfMaskedVal(N, DAG))
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return V;
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if (SimplifyDemandedBits(SDValue(N, 0)))
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return SDValue(N, 0);
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@ -2579,6 +2621,9 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
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if (N1.isUndef())
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return N1;
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if (SDValue V = foldAddSubBoolOfMaskedVal(N, DAG))
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return V;
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// fold Y = sra (X, size(X)-1); sub (xor (X, Y), Y) -> (abs X)
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if (TLI.isOperationLegalOrCustom(ISD::ABS, VT)) {
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if (N0.getOpcode() == ISD::XOR && N1.getOpcode() == ISD::SRA) {
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@ -4,9 +4,9 @@
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define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nor 3, 3, 3
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; CHECK-NEXT: clrlwi 3, 3, 31
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; CHECK-NEXT: subfic 3, 3, -27
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 65508
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; CHECK-NEXT: oris 3, 3, 65535
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -18,9 +18,8 @@ define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
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define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nor 3, 3, 3
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; CHECK-NEXT: clrlwi 3, 3, 31
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; CHECK-NEXT: subfic 3, 3, 27
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 26
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -32,9 +31,8 @@ define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
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define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nor 3, 3, 3
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; CHECK-NEXT: clrlwi 3, 3, 31
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; CHECK-NEXT: subfic 3, 3, 47
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 46
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -46,10 +44,8 @@ define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
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define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 65535
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 26
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 27
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -61,10 +57,8 @@ define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
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define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 65535
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 26
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 27
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -76,10 +70,8 @@ define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
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define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 65535
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 42
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 43
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -130,11 +122,8 @@ define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
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define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 65535
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 65506
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; CHECK-NEXT: oris 3, 3, 65535
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, -29
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -145,9 +134,8 @@ define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
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define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: not 3, 3
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 226
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; CHECK-NEXT: subfic 3, 3, 227
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -158,10 +146,8 @@ define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
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define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xori 3, 3, 65535
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; CHECK-NEXT: xoris 3, 3, 65535
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 40
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 41
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; CHECK-NEXT: blr
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%a = and i16 %x, 1
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%c = icmp eq i16 %a, 0
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@ -4,10 +4,9 @@
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define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: cmpl $1, %edi
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; CHECK-NEXT: movl $-27, %eax
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; CHECK-NEXT: sbbl $0, %eax
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; CHECK-NEXT: leal -28(%rdi), %eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -19,10 +18,9 @@ define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
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define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andb $1, %dil
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; CHECK-NEXT: cmpb $1, %dil
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; CHECK-NEXT: movl $27, %eax
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; CHECK-NEXT: sbbl $0, %eax
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal 26(%rdi), %eax
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -35,9 +33,8 @@ define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: cmpl $1, %edi
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; CHECK-NEXT: movb $47, %al
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; CHECK-NEXT: sbbb $0, %al
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; CHECK-NEXT: orb $46, %dil
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -49,9 +46,9 @@ define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
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define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: orb $26, %al
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; CHECK-NEXT: andb $1, %dil
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; CHECK-NEXT: movb $27, %al
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; CHECK-NEXT: subb %dil, %al
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -63,10 +60,9 @@ define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
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define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: orl $26, %eax
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: movl $27, %eax
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; CHECK-NEXT: subl %edi, %eax
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; CHECK-NEXT: retq
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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@ -78,9 +74,9 @@ define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
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define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: orb $42, %al
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: movb $43, %al
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; CHECK-NEXT: subb %dil, %al
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -92,10 +88,9 @@ define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
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define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: cmpl $1, %edi
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; CHECK-NEXT: movl $43, %eax
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; CHECK-NEXT: sbbl $0, %eax
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; CHECK-NEXT: leal 42(%rdi), %eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -106,10 +101,9 @@ define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
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define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: cmpl $1, %edi
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; CHECK-NEXT: movl $27, %eax
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; CHECK-NEXT: sbbq $0, %rax
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; CHECK-NEXT: leaq 26(%rdi), %rax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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@ -120,10 +114,10 @@ define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
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define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: cmpl $1, %edi
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; CHECK-NEXT: movw $37, %ax
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; CHECK-NEXT: sbbw $0, %ax
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; CHECK-NEXT: leal 36(%rdi), %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: retq
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%a = and i32 %x, 1
|
||||
%c = icmp eq i32 %a, 0
|
||||
@ -134,9 +128,9 @@ define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
|
||||
define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
|
||||
; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: sete %al
|
||||
; CHECK-NEXT: orb $-30, %al
|
||||
; CHECK-NEXT: andb $1, %dil
|
||||
; CHECK-NEXT: movb $-29, %al
|
||||
; CHECK-NEXT: subb %dil, %al
|
||||
; CHECK-NEXT: retq
|
||||
%a = and i8 %x, 1
|
||||
%c = icmp eq i8 %a, 0
|
||||
@ -147,10 +141,9 @@ define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
|
||||
define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
|
||||
; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: xorl %eax, %eax
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: sete %al
|
||||
; CHECK-NEXT: orl $226, %eax
|
||||
; CHECK-NEXT: andl $1, %edi
|
||||
; CHECK-NEXT: movl $227, %eax
|
||||
; CHECK-NEXT: subl %edi, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%a = and i8 %x, 1
|
||||
%c = icmp eq i8 %a, 0
|
||||
@ -161,9 +154,9 @@ define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
|
||||
define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
|
||||
; CHECK-LABEL: low_bit_select_constants_bigger_true_narrower_result:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: sete %al
|
||||
; CHECK-NEXT: orb $40, %al
|
||||
; CHECK-NEXT: andl $1, %edi
|
||||
; CHECK-NEXT: movb $41, %al
|
||||
; CHECK-NEXT: subb %dil, %al
|
||||
; CHECK-NEXT: retq
|
||||
%a = and i16 %x, 1
|
||||
%c = icmp eq i16 %a, 0
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user