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[llvm-mca] PR39261: Rename FetchStage to EntryStage.

This fixes PR39261.

FetchStage is a misnomer. It causes confusion with the frontend fetch stage,
which we don't currently simulate.  I decided to rename it into EntryStage
mainly because this is meant to be a "source" stage for all pipelines.

Differential Revision: https://reviews.llvm.org/D54268

llvm-svn: 346419
This commit is contained in:
Andrea Di Biagio 2018-11-08 17:49:30 +00:00
parent 5ff2f474ff
commit b212088edb
5 changed files with 23 additions and 22 deletions

View File

@ -1,4 +1,4 @@
//===---------------------- FetchStage.h ------------------------*- C++ -*-===//
//===---------------------- EntryStage.h ------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@ -8,13 +8,14 @@
//===----------------------------------------------------------------------===//
/// \file
///
/// This file defines the Fetch stage of an instruction pipeline. Its sole
/// purpose in life is to produce instructions for the rest of the pipeline.
/// This file defines the Entry stage of an instruction pipeline. Its sole
/// purpose in life is to pick instructions in sequence and move them to the
/// next pipeline stage.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_TOOLS_LLVM_MCA_FETCH_STAGE_H
#define LLVM_TOOLS_LLVM_MCA_FETCH_STAGE_H
#ifndef LLVM_TOOLS_LLVM_MCA_ENTRY_STAGE_H
#define LLVM_TOOLS_LLVM_MCA_ENTRY_STAGE_H
#include "SourceMgr.h"
#include "Stages/Stage.h"
@ -23,7 +24,7 @@
namespace llvm {
namespace mca {
class FetchStage final : public Stage {
class EntryStage final : public Stage {
InstRef CurrentInstruction;
using InstMap = std::map<unsigned, std::unique_ptr<Instruction>>;
InstMap Instructions;
@ -32,11 +33,11 @@ class FetchStage final : public Stage {
// Updates the program counter, and sets 'CurrentInstruction'.
void getNextInstruction();
FetchStage(const FetchStage &Other) = delete;
FetchStage &operator=(const FetchStage &Other) = delete;
EntryStage(const EntryStage &Other) = delete;
EntryStage &operator=(const EntryStage &Other) = delete;
public:
FetchStage(SourceMgr &SM) : CurrentInstruction(), SM(SM) {}
EntryStage(SourceMgr &SM) : CurrentInstruction(), SM(SM) {}
bool isAvailable(const InstRef &IR) const override;
bool hasWorkToComplete() const override;

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@ -14,8 +14,8 @@ add_library(LLVMMCA
Instruction.cpp
Pipeline.cpp
Stages/DispatchStage.cpp
Stages/EntryStage.cpp
Stages/ExecuteStage.cpp
Stages/FetchStage.cpp
Stages/InstructionTables.cpp
Stages/RetireStage.cpp
Stages/Stage.cpp

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@ -20,8 +20,8 @@
#include "HardwareUnits/RetireControlUnit.h"
#include "HardwareUnits/Scheduler.h"
#include "Stages/DispatchStage.h"
#include "Stages/EntryStage.h"
#include "Stages/ExecuteStage.h"
#include "Stages/FetchStage.h"
#include "Stages/RetireStage.h"
namespace llvm {
@ -40,7 +40,7 @@ Context::createDefaultPipeline(const PipelineOptions &Opts, InstrBuilder &IB,
auto HWS = llvm::make_unique<Scheduler>(SM, LSU.get());
// Create the pipeline stages.
auto Fetch = llvm::make_unique<FetchStage>(SrcMgr);
auto Fetch = llvm::make_unique<EntryStage>(SrcMgr);
auto Dispatch = llvm::make_unique<DispatchStage>(STI, MRI, Opts.DispatchWidth,
*RCU, *PRF);
auto Execute = llvm::make_unique<ExecuteStage>(*HWS);

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@ -1,4 +1,4 @@
//===---------------------- FetchStage.cpp ----------------------*- C++ -*-===//
//===---------------------- EntryStage.cpp ----------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@ -13,21 +13,21 @@
///
//===----------------------------------------------------------------------===//
#include "Stages/FetchStage.h"
#include "Stages/EntryStage.h"
#include "Instruction.h"
namespace llvm {
namespace mca {
bool FetchStage::hasWorkToComplete() const { return CurrentInstruction; }
bool EntryStage::hasWorkToComplete() const { return CurrentInstruction; }
bool FetchStage::isAvailable(const InstRef & /* unused */) const {
bool EntryStage::isAvailable(const InstRef & /* unused */) const {
if (CurrentInstruction)
return checkNextStage(CurrentInstruction);
return false;
}
void FetchStage::getNextInstruction() {
void EntryStage::getNextInstruction() {
assert(!CurrentInstruction && "There is already an instruction to process!");
if (!SM.hasNext())
return;
@ -38,7 +38,7 @@ void FetchStage::getNextInstruction() {
SM.updateNext();
}
llvm::Error FetchStage::execute(InstRef & /*unused */) {
llvm::Error EntryStage::execute(InstRef & /*unused */) {
assert(CurrentInstruction && "There is no instruction to process!");
if (llvm::Error Val = moveToTheNextStage(CurrentInstruction))
return Val;
@ -49,13 +49,13 @@ llvm::Error FetchStage::execute(InstRef & /*unused */) {
return llvm::ErrorSuccess();
}
llvm::Error FetchStage::cycleStart() {
llvm::Error EntryStage::cycleStart() {
if (!CurrentInstruction)
getNextInstruction();
return llvm::ErrorSuccess();
}
llvm::Error FetchStage::cycleEnd() {
llvm::Error EntryStage::cycleEnd() {
// Find the first instruction which hasn't been retired.
const InstMap::iterator It =
llvm::find_if(Instructions, [](const InstMap::value_type &KeyValuePair) {

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@ -24,7 +24,7 @@
#include "CodeRegion.h"
#include "CodeRegionGenerator.h"
#include "PipelinePrinter.h"
#include "Stages/FetchStage.h"
#include "Stages/EntryStage.h"
#include "Stages/InstructionTables.h"
#include "Views/DispatchStatistics.h"
#include "Views/InstructionInfoView.h"
@ -434,7 +434,7 @@ int main(int argc, char **argv) {
if (PrintInstructionTables) {
// Create a pipeline, stages, and a printer.
auto P = make_unique<mca::Pipeline>();
P->appendStage(make_unique<mca::FetchStage>(S));
P->appendStage(make_unique<mca::EntryStage>(S));
P->appendStage(make_unique<mca::InstructionTables>(SM));
mca::PipelinePrinter Printer(*P);