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[X86] Accept imp-defs of GR64 super-registers in FixupBW MOVrr.

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Testcase will follow shortly.

llvm-svn: 268787
This commit is contained in:
Ahmed Bougacha 2016-05-06 20:03:03 +00:00
parent 181dd83a14
commit b21c6806a5
1 changed files with 11 additions and 5 deletions
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16
lib/Target/X86/X86FixupBWInsts.cpp
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@ -248,11 +248,17 @@ MachineInstr *FixupBWInstPass::tryReplaceCopy(MachineInstr *MI) const {
BuildMI(*MF, MI->getDebugLoc(), TII->get(X86::MOV32rr), NewDestReg)
.addReg(NewSrcReg);
#ifndef NDEBUG
// Make sure we didn't drop any other implicit operand.
for (auto &Op : MI->implicit_operands())
assert(Op.getReg() == NewDestReg && "Copy imp-defs unrelated reg?");
#endif
// Make sure we don't drop implicit operands.
// We used to imp-def the super, but we don't need to anymore, as we turned
// it into an explicit def. However, we might still need to imp-def the GR64
// super-register.
for (auto &Op : MI->implicit_operands()) {
if (Op.getReg() == NewDestReg && Op.isDef())
continue;
assert((!Op.isDef() || TRI->isSubRegister(Op.getReg(), NewDestReg)) &&
"Copy imp-defs unrelated reg?");
MIB.addOperand(Op);
}
return MIB;
}