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[clang][ARM] Remove arm2/3/6/7m CPU names

These legacy CPUs are known to clang but not llvm.
Their use was ignored by llvm and it would print a
warning saying it did not recognise them.

However because some of them are default CPUs for their
architecture, you would get those warnings even if you didn't
choose a cpu explicitly.
(now those architectures will default to a "generic" CPU)

Information is thin on the ground for these older chips
so this is the best I could find:
https://en.wikichip.org/wiki/acorn/microarchitectures/arm2
https://en.wikichip.org/wiki/acorn/microarchitectures/arm3
https://en.wikichip.org/wiki/arm_holdings/microarchitectures/arm6
https://en.wikichip.org/wiki/arm_holdings/microarchitectures/arm7

Final part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D103028
This commit is contained in:
David Spickett 2021-05-24 14:16:42 +00:00
parent 5419f2ccbb
commit b2313e8eb4
2 changed files with 5 additions and 21 deletions

View File

@ -201,10 +201,6 @@ ARM_HW_DIV_NAME("arm,thumb", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB))
#ifndef ARM_CPU_NAME
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)
#endif
ARM_CPU_NAME("arm2", ARMV2, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm3", ARMV2A, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm6", ARMV3, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm7m", ARMV3M, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm8", ARMV4, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm810", ARMV4, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("strongarm", ARMV4, FK_NONE, true, ARM::AEK_NONE)

View File

@ -124,10 +124,6 @@ INSTANTIATE_TEST_SUITE_P(
ARMCPUTestParams("invalid", "invalid", "invalid", ARM::AEK_NONE, ""),
ARMCPUTestParams("generic", "invalid", "none", ARM::AEK_NONE, ""),
ARMCPUTestParams("arm2", "armv2", "none", ARM::AEK_NONE, "2"),
ARMCPUTestParams("arm3", "armv2a", "none", ARM::AEK_NONE, "2A"),
ARMCPUTestParams("arm6", "armv3", "none", ARM::AEK_NONE, "3"),
ARMCPUTestParams("arm7m", "armv3m", "none", ARM::AEK_NONE, "3M"),
ARMCPUTestParams("arm8", "armv4", "none", ARM::AEK_NONE, "4"),
ARMCPUTestParams("arm810", "armv4", "none", ARM::AEK_NONE, "4"),
ARMCPUTestParams("strongarm", "armv4", "none", ARM::AEK_NONE, "4"),
@ -388,7 +384,7 @@ INSTANTIATE_TEST_SUITE_P(
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP,
"7-S")));
static constexpr unsigned NumARMCPUArchs = 90;
static constexpr unsigned NumARMCPUArchs = 86;
TEST(TargetParserTest, testARMCPUArchList) {
SmallVector<StringRef, NumARMCPUArchs> List;
@ -420,17 +416,13 @@ bool testARMArch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
TEST(TargetParserTest, testARMArch) {
EXPECT_TRUE(
testARMArch("armv2", "arm2", "v2",
ARMBuildAttrs::CPUArch::Pre_v4));
testARMArch("armv2", "generic", "v2", ARMBuildAttrs::CPUArch::Pre_v4));
EXPECT_TRUE(
testARMArch("armv2a", "arm3", "v2a",
ARMBuildAttrs::CPUArch::Pre_v4));
testARMArch("armv2a", "generic", "v2a", ARMBuildAttrs::CPUArch::Pre_v4));
EXPECT_TRUE(
testARMArch("armv3", "arm6", "v3",
ARMBuildAttrs::CPUArch::Pre_v4));
testARMArch("armv3", "generic", "v3", ARMBuildAttrs::CPUArch::Pre_v4));
EXPECT_TRUE(
testARMArch("armv3m", "arm7m", "v3m",
ARMBuildAttrs::CPUArch::Pre_v4));
testARMArch("armv3m", "generic", "v3m", ARMBuildAttrs::CPUArch::Pre_v4));
EXPECT_TRUE(
testARMArch("armv4", "strongarm", "v4",
ARMBuildAttrs::CPUArch::v4));
@ -535,10 +527,6 @@ bool testARMExtension(StringRef CPUName,ARM::ArchKind ArchKind, StringRef ArchEx
}
TEST(TargetParserTest, testARMExtension) {
EXPECT_FALSE(testARMExtension("arm2", ARM::ArchKind::INVALID, "thumb"));
EXPECT_FALSE(testARMExtension("arm3", ARM::ArchKind::INVALID, "thumb"));
EXPECT_FALSE(testARMExtension("arm6", ARM::ArchKind::INVALID, "thumb"));
EXPECT_FALSE(testARMExtension("arm7m", ARM::ArchKind::INVALID, "thumb"));
EXPECT_FALSE(testARMExtension("strongarm", ARM::ArchKind::INVALID, "dsp"));
EXPECT_FALSE(testARMExtension("arm7tdmi", ARM::ArchKind::INVALID, "dsp"));
EXPECT_FALSE(testARMExtension("arm10tdmi",