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Add @earlyclobber constraints to the writeback register of all ARM store instructions.
The ARMARM specifies these instructions as unpredictable when storing the writeback register. This shouldn't affect code generation much since storing a pointer to itself is quite rare. llvm-svn: 129409
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@ -1802,41 +1802,47 @@ def STRD : AI3str<0b1111, (outs), (ins GPR:$Rt, GPR:$src2, addrmode3:$addr),
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def STR_PRE : AI2stridx<0, 1, (outs GPR:$Rn_wb),
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(ins GPR:$Rt, GPR:$Rn, am2offset:$offset),
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IndexModePre, StFrm, IIC_iStore_ru,
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"str", "\t$Rt, [$Rn, $offset]!", "$Rn = $Rn_wb",
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"str", "\t$Rt, [$Rn, $offset]!",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPR:$Rn_wb,
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(pre_store GPR:$Rt, GPR:$Rn, am2offset:$offset))]>;
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def STR_POST : AI2stridx<0, 0, (outs GPR:$Rn_wb),
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(ins GPR:$Rt, GPR:$Rn, am2offset:$offset),
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IndexModePost, StFrm, IIC_iStore_ru,
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"str", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb",
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"str", "\t$Rt, [$Rn], $offset",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPR:$Rn_wb,
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(post_store GPR:$Rt, GPR:$Rn, am2offset:$offset))]>;
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def STRB_PRE : AI2stridx<1, 1, (outs GPR:$Rn_wb),
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(ins GPR:$Rt, GPR:$Rn, am2offset:$offset),
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IndexModePre, StFrm, IIC_iStore_bh_ru,
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"strb", "\t$Rt, [$Rn, $offset]!", "$Rn = $Rn_wb",
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"strb", "\t$Rt, [$Rn, $offset]!",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPR:$Rn_wb, (pre_truncsti8 GPR:$Rt,
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GPR:$Rn, am2offset:$offset))]>;
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def STRB_POST: AI2stridx<1, 0, (outs GPR:$Rn_wb),
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(ins GPR:$Rt, GPR:$Rn, am2offset:$offset),
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IndexModePost, StFrm, IIC_iStore_bh_ru,
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"strb", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb",
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"strb", "\t$Rt, [$Rn], $offset",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPR:$Rn_wb, (post_truncsti8 GPR:$Rt,
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GPR:$Rn, am2offset:$offset))]>;
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def STRH_PRE : AI3stridx<0b1011, 0, 1, (outs GPR:$Rn_wb),
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(ins GPR:$Rt, GPR:$Rn, am3offset:$offset),
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IndexModePre, StMiscFrm, IIC_iStore_ru,
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"strh", "\t$Rt, [$Rn, $offset]!", "$Rn = $Rn_wb",
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"strh", "\t$Rt, [$Rn, $offset]!",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPR:$Rn_wb,
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(pre_truncsti16 GPR:$Rt, GPR:$Rn, am3offset:$offset))]>;
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def STRH_POST: AI3stridx<0b1011, 0, 0, (outs GPR:$Rn_wb),
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(ins GPR:$Rt, GPR:$Rn, am3offset:$offset),
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IndexModePost, StMiscFrm, IIC_iStore_bh_ru,
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"strh", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb",
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"strh", "\t$Rt, [$Rn], $offset",
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"$Rn = $Rn_wb,@earlyclobber $Rn_wb",
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[(set GPR:$Rn_wb, (post_truncsti16 GPR:$Rt,
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GPR:$Rn, am3offset:$offset))]>;
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@ -1423,42 +1423,48 @@ def t2STRDi8 : T2Ii8s4<1, 0, 0, (outs),
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def t2STR_PRE : T2Iidxldst<0, 0b10, 0, 1, (outs GPR:$base_wb),
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(ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
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AddrModeT2_i8, IndexModePre, IIC_iStore_iu,
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"str", "\t$Rt, [$Rn, $addr]!", "$Rn = $base_wb",
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"str", "\t$Rt, [$Rn, $addr]!",
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"$Rn = $base_wb,@earlyclobber $base_wb",
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[(set GPR:$base_wb,
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(pre_store GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
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def t2STR_POST : T2Iidxldst<0, 0b10, 0, 0, (outs GPR:$base_wb),
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(ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
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AddrModeT2_i8, IndexModePost, IIC_iStore_iu,
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"str", "\t$Rt, [$Rn], $addr", "$Rn = $base_wb",
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"str", "\t$Rt, [$Rn], $addr",
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"$Rn = $base_wb,@earlyclobber $base_wb",
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[(set GPR:$base_wb,
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(post_store GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
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def t2STRH_PRE : T2Iidxldst<0, 0b01, 0, 1, (outs GPR:$base_wb),
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(ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
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AddrModeT2_i8, IndexModePre, IIC_iStore_iu,
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"strh", "\t$Rt, [$Rn, $addr]!", "$Rn = $base_wb",
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"strh", "\t$Rt, [$Rn, $addr]!",
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"$Rn = $base_wb,@earlyclobber $base_wb",
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[(set GPR:$base_wb,
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(pre_truncsti16 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
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def t2STRH_POST : T2Iidxldst<0, 0b01, 0, 0, (outs GPR:$base_wb),
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(ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
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AddrModeT2_i8, IndexModePost, IIC_iStore_bh_iu,
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"strh", "\t$Rt, [$Rn], $addr", "$Rn = $base_wb",
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"strh", "\t$Rt, [$Rn], $addr",
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"$Rn = $base_wb,@earlyclobber $base_wb",
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[(set GPR:$base_wb,
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(post_truncsti16 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
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def t2STRB_PRE : T2Iidxldst<0, 0b00, 0, 1, (outs GPR:$base_wb),
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(ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
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AddrModeT2_i8, IndexModePre, IIC_iStore_bh_iu,
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"strb", "\t$Rt, [$Rn, $addr]!", "$Rn = $base_wb",
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"strb", "\t$Rt, [$Rn, $addr]!",
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"$Rn = $base_wb,@earlyclobber $base_wb",
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[(set GPR:$base_wb,
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(pre_truncsti8 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
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def t2STRB_POST : T2Iidxldst<0, 0b00, 0, 0, (outs GPR:$base_wb),
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(ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
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AddrModeT2_i8, IndexModePost, IIC_iStore_bh_iu,
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"strb", "\t$Rt, [$Rn], $addr", "$Rn = $base_wb",
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"strb", "\t$Rt, [$Rn], $addr",
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"$Rn = $base_wb,@earlyclobber $base_wb",
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[(set GPR:$base_wb,
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(post_truncsti8 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
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