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[AArch64][GlobalISel] Tweak legalization rule for G_BSWAP to handle widening s16.
llvm-svn: 372812
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@ -82,7 +82,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) {
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getActionDefinitionsBuilder(G_BSWAP)
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.legalFor({s32, s64, v4s32, v2s32, v2s64})
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.clampScalar(0, s16, s64)
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.clampScalar(0, s32, s64)
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.widenScalarToNextPow2(0);
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getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
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44
test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
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44
test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
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@ -0,0 +1,44 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -verify-machineinstrs | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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declare i16 @llvm.bswap.i16(i16) #0
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define i16 @bswap_s16(i16 %a) { ret i16 0 }
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attributes #0 = { nounwind readnone speculatable willreturn }
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...
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---
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name: bswap_s16
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$w0' }
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.1:
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liveins: $w0
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; CHECK-LABEL: name: bswap_s16
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
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; CHECK: [[BSWAP:%[0-9]+]]:_(s32) = G_BSWAP [[COPY1]]
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BSWAP]], [[C]](s64)
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
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; CHECK: $w0 = COPY [[COPY2]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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%1:_(s32) = COPY $w0
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%0:_(s16) = G_TRUNC %1(s32)
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%2:_(s16) = G_BSWAP %0
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%3:_(s32) = G_ANYEXT %2(s16)
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$w0 = COPY %3(s32)
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RET_ReallyLR implicit $w0
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...
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